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From: Mario Limonciello <superm1@kernel.org>
To: Borislav Petkov <bp@alien8.de>
Cc: "Jean Delvare" <jdelvare@suse.com>,
	"Andi Shyti" <andi.shyti@kernel.org>,
	"Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>,
	"Jonathan Corbet" <corbet@lwn.net>,
	"Mario Limonciello" <mario.limonciello@amd.com>,
	"Yazen Ghannam" <yazen.ghannam@amd.com>,
	"Thomas Gleixner" <tglx@linutronix.de>,
	"Ingo Molnar" <mingo@redhat.com>,
	"Dave Hansen" <dave.hansen@linux.intel.com>,
	"maintainer:X86 ARCHITECTURE (32-BIT AND 64-BIT)"
	<x86@kernel.org>, "H . Peter Anvin" <hpa@zytor.com>,
	"Shyam Sundar S K" <Shyam-sundar.S-k@amd.com>,
	"Hans de Goede" <hdegoede@redhat.com>,
	"open list:DOCUMENTATION" <linux-doc@vger.kernel.org>,
	"open list" <linux-kernel@vger.kernel.org>,
	"open list:I2C/SMBUS CONTROLLER DRIVERS FOR PC"
	<linux-i2c@vger.kernel.org>,
	"open list:AMD PMC DRIVER" <platform-driver-x86@vger.kernel.org>
Subject: Re: [PATCH v3 4/4] x86/CPU/AMD: Print the reason for the last reset
Date: Fri, 11 Apr 2025 08:25:55 -0500	[thread overview]
Message-ID: <f7e66377-4616-4e3e-aa2d-ccd512411f21@kernel.org> (raw)
In-Reply-To: <20250411125050.GEZ_kQKtYBfEMDQuXU@fat_crate.local>



On 4/11/25 07:50, Borislav Petkov wrote:
> On Fri, Apr 11, 2025 at 07:12:24AM -0500, Mario Limonciello wrote:
>> The idea was to walk all the bits and pick the first one that has a string
>> associated with it.  I was finding that sometimes the reserved bits are set
>> which would get you a NULL pointer deref.
> 
> Uff, that needs a comment at least.
> 
> But you can write it a lot simpler instead:
> 
> 	for (i = 0; i <= ARRAY_SIZE(s5_reset_reason_txt); i++) {
> 		if (!(value & BIT(i)))
> 			continue;
> 
> 		if (s5_reset_reason_txt[i])
> 			break;
> 	}
> 
> Simple loop, simple statements and all easy. :-)
> 
>> Right; I was worried about that too but find_next_bit() will return the size
>> argument when it doesn't find anything.
>>
>> So that should be s5_reset_reason_txt[32] which has the "Unknown" string.
> 
> Yeah, that definitely needs a comment above it.
> 

Thanks; I'll take your simpler solution and leave a comment above the 
!(value & BIT(i)) check about skipping reserved bits.

  reply	other threads:[~2025-04-11 13:25 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-04-10 20:01 [PATCH v3 0/4] AMD Zen debugging documentation Mario Limonciello
2025-04-10 20:01 ` [PATCH v3 1/4] Documentation: Add AMD Zen debugging document Mario Limonciello
2025-04-12  2:12   ` Bagas Sanjaya
2025-04-12  2:19     ` Mario Limonciello
2025-04-12  2:28       ` Bagas Sanjaya
2025-04-10 20:02 ` [PATCH v3 2/4] i2c: piix4: Move SB800_PIIX4_FCH_PM_ADDR definition to amd_node.h Mario Limonciello
2025-04-11 11:49   ` Borislav Petkov
2025-04-11 12:09     ` Mario Limonciello
2025-04-11 12:41       ` Borislav Petkov
2025-04-12 19:44         ` Ingo Molnar
2025-04-12 19:51           ` Mario Limonciello
2025-04-12 20:15             ` Ingo Molnar
2025-04-12 20:23               ` Mario Limonciello
2025-04-12 20:47                 ` Ingo Molnar
2025-04-12 22:29               ` Borislav Petkov
2025-04-13  7:54                 ` Ingo Molnar
2025-04-13  8:44                   ` Ingo Molnar
2025-04-13 19:27                     ` Mario Limonciello
2025-04-13 19:32                       ` Ingo Molnar
2025-04-11 21:15   ` kernel test robot
2025-04-11 21:56   ` kernel test robot
2025-04-10 20:02 ` [PATCH v3 3/4] platform/x86/amd: pmc: use FCH_PM_BASE definition Mario Limonciello
2025-04-10 20:02 ` [PATCH v3 4/4] x86/CPU/AMD: Print the reason for the last reset Mario Limonciello
2025-04-11 12:06   ` Borislav Petkov
2025-04-11 12:12     ` Mario Limonciello
2025-04-11 12:50       ` Borislav Petkov
2025-04-11 13:25         ` Mario Limonciello [this message]
2025-04-12 19:37       ` Ingo Molnar

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