* [PATCH v2] bus: mhi: host: fix endianness of BHI vector table
@ 2025-05-15 9:55 Alexander Wilhelm
2025-05-16 15:13 ` Jeff Hugo
0 siblings, 1 reply; 3+ messages in thread
From: Alexander Wilhelm @ 2025-05-15 9:55 UTC (permalink / raw)
To: Manivannan Sadhasivam; +Cc: mhi, linux-arm-msm, linux-kernel
On big endian platforms like PowerPC the DMA address and size are required
to be swapped. Otherwise the MHI bus does not start properly. The following
example shows the error messages by using qcn9274 wireless radio module
with ath12k driver:
ath12k_pci 0001:01:00.0: BAR 0: assigned [mem 0xc00000000-0xc001fffff 64bit]
ath12k_pci 0001:01:00.0: MSI vectors: 1
ath12k_pci 0001:01:00.0: Hardware name: qcn9274 hw2.0
ath12k_pci 0001:01:00.0: failed to set mhi state: POWER_ON(2)
ath12k_pci 0001:01:00.0: failed to start mhi: -110
ath12k_pci 0001:01:00.0: failed to power up :-110
ath12k_pci 0001:01:00.0: failed to create soc core: -110
ath12k_pci 0001:01:00.0: failed to init core: -110
ath12k_pci: probe of 0001:01:00.0 failed with error -110
Signed-off-by: Alexander Wilhelm <alexander.wilhelm@westermo.com>
---
Changes in v2:
- Set __le64 type for dma_addr and size.
drivers/bus/mhi/host/boot.c | 8 ++++----
drivers/bus/mhi/host/internal.h | 4 ++--
2 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/bus/mhi/host/boot.c b/drivers/bus/mhi/host/boot.c
index efa3b6dddf4d..205d83ac069f 100644
--- a/drivers/bus/mhi/host/boot.c
+++ b/drivers/bus/mhi/host/boot.c
@@ -31,8 +31,8 @@ int mhi_rddm_prepare(struct mhi_controller *mhi_cntrl,
int ret;
for (i = 0; i < img_info->entries - 1; i++, mhi_buf++, bhi_vec++) {
- bhi_vec->dma_addr = mhi_buf->dma_addr;
- bhi_vec->size = mhi_buf->len;
+ bhi_vec->dma_addr = cpu_to_le64(mhi_buf->dma_addr);
+ bhi_vec->size = cpu_to_le64(mhi_buf->len);
}
dev_dbg(dev, "BHIe programming for RDDM\n");
@@ -431,8 +431,8 @@ static void mhi_firmware_copy_bhie(struct mhi_controller *mhi_cntrl,
while (remainder) {
to_cpy = min(remainder, mhi_buf->len);
memcpy(mhi_buf->buf, buf, to_cpy);
- bhi_vec->dma_addr = mhi_buf->dma_addr;
- bhi_vec->size = to_cpy;
+ bhi_vec->dma_addr = cpu_to_le64(mhi_buf->dma_addr);
+ bhi_vec->size = cpu_to_le64(to_cpy);
buf += to_cpy;
remainder -= to_cpy;
diff --git a/drivers/bus/mhi/host/internal.h b/drivers/bus/mhi/host/internal.h
index ce566f7d2e92..1dbc3f736161 100644
--- a/drivers/bus/mhi/host/internal.h
+++ b/drivers/bus/mhi/host/internal.h
@@ -25,8 +25,8 @@ struct mhi_ctxt {
};
struct bhi_vec_entry {
- u64 dma_addr;
- u64 size;
+ __le64 dma_addr;
+ __le64 size;
};
enum mhi_fw_load_type {
--
2.34.1
^ permalink raw reply [flat|nested] 3+ messages in thread* Re: [PATCH v2] bus: mhi: host: fix endianness of BHI vector table
2025-05-15 9:55 [PATCH v2] bus: mhi: host: fix endianness of BHI vector table Alexander Wilhelm
@ 2025-05-16 15:13 ` Jeff Hugo
2025-05-19 6:09 ` Alexander Wilhelm
0 siblings, 1 reply; 3+ messages in thread
From: Jeff Hugo @ 2025-05-16 15:13 UTC (permalink / raw)
To: Alexander Wilhelm, Manivannan Sadhasivam; +Cc: mhi, linux-arm-msm, linux-kernel
On 5/15/2025 3:55 AM, Alexander Wilhelm wrote:
> On big endian platforms like PowerPC the DMA address and size are required
> to be swapped. Otherwise the MHI bus does not start properly. The following
> example shows the error messages by using qcn9274 wireless radio module
> with ath12k driver:
>
> ath12k_pci 0001:01:00.0: BAR 0: assigned [mem 0xc00000000-0xc001fffff 64bit]
> ath12k_pci 0001:01:00.0: MSI vectors: 1
> ath12k_pci 0001:01:00.0: Hardware name: qcn9274 hw2.0
> ath12k_pci 0001:01:00.0: failed to set mhi state: POWER_ON(2)
> ath12k_pci 0001:01:00.0: failed to start mhi: -110
> ath12k_pci 0001:01:00.0: failed to power up :-110
> ath12k_pci 0001:01:00.0: failed to create soc core: -110
> ath12k_pci 0001:01:00.0: failed to init core: -110
> ath12k_pci: probe of 0001:01:00.0 failed with error -110
>
Fixes?
> Signed-off-by: Alexander Wilhelm <alexander.wilhelm@westermo.com>
Reviewed-by: Jeff Hugo <jeff.hugo@oss.qualcomm.com>
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH v2] bus: mhi: host: fix endianness of BHI vector table
2025-05-16 15:13 ` Jeff Hugo
@ 2025-05-19 6:09 ` Alexander Wilhelm
0 siblings, 0 replies; 3+ messages in thread
From: Alexander Wilhelm @ 2025-05-19 6:09 UTC (permalink / raw)
To: Jeff Hugo; +Cc: Manivannan Sadhasivam, mhi, linux-arm-msm, linux-kernel
Am Fri, May 16, 2025 at 09:13:46AM -0600 schrieb Jeff Hugo:
> On 5/15/2025 3:55 AM, Alexander Wilhelm wrote:
> > On big endian platforms like PowerPC the DMA address and size are required
> > to be swapped. Otherwise the MHI bus does not start properly. The following
> > example shows the error messages by using qcn9274 wireless radio module
> > with ath12k driver:
> >
> > ath12k_pci 0001:01:00.0: BAR 0: assigned [mem 0xc00000000-0xc001fffff 64bit]
> > ath12k_pci 0001:01:00.0: MSI vectors: 1
> > ath12k_pci 0001:01:00.0: Hardware name: qcn9274 hw2.0
> > ath12k_pci 0001:01:00.0: failed to set mhi state: POWER_ON(2)
> > ath12k_pci 0001:01:00.0: failed to start mhi: -110
> > ath12k_pci 0001:01:00.0: failed to power up :-110
> > ath12k_pci 0001:01:00.0: failed to create soc core: -110
> > ath12k_pci 0001:01:00.0: failed to init core: -110
> > ath12k_pci: probe of 0001:01:00.0 failed with error -110
> >
>
> Fixes?
Yes, it does. But I see know that the commit message is not clear enough.
I'll fix that.
Best regards
Alexander Wilhelm
>
> > Signed-off-by: Alexander Wilhelm <alexander.wilhelm@westermo.com>
>
> Reviewed-by: Jeff Hugo <jeff.hugo@oss.qualcomm.com>
^ permalink raw reply [flat|nested] 3+ messages in thread
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2025-05-15 9:55 [PATCH v2] bus: mhi: host: fix endianness of BHI vector table Alexander Wilhelm
2025-05-16 15:13 ` Jeff Hugo
2025-05-19 6:09 ` Alexander Wilhelm
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