From: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>
To: Thomas Gleixner <tglx@linutronix.de>,
LKML <linux-kernel@vger.kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>,
Gabriele Monaco <gmonaco@redhat.com>,
Michael Jeanson <mjeanson@efficios.com>,
Jens Axboe <axboe@kernel.dk>,
"Paul E. McKenney" <paulmck@kernel.org>,
"Gautham R. Shenoy" <gautham.shenoy@amd.com>,
Florian Weimer <fweimer@redhat.com>,
Tim Chen <tim.c.chen@intel.com>,
Yury Norov <yury.norov@gmail.com>,
Shrikanth Hegde <sshegde@linux.ibm.com>
Subject: Re: [patch V4 09/20] cpumask: Cache num_possible_cpus()
Date: Mon, 17 Nov 2025 11:48:29 -0500 [thread overview]
Message-ID: <fa998fb1-3054-4457-99df-c4cf1940fdc3@efficios.com> (raw)
In-Reply-To: <20251104075427.221776184@linutronix.de>
On 2025-11-16 15:48, Thomas Gleixner wrote:
> Reevaluating num_possible_cpus() over and over does not make sense. That
> becomes a constant after init as cpu_possible_mask is marked ro_after_init.
>
> Cache the value during initialization and provide that for consumption.
>
> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
> Reviewed-by: Yury Norov <yury.norov@gmail.com>
Reviewed-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>
--
Mathieu Desnoyers
EfficiOS Inc.
https://www.efficios.com
next prev parent reply other threads:[~2025-11-17 16:48 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-11-16 20:48 [patch V4 00/20] sched: Rewrite MM CID management Thomas Gleixner
2025-11-16 20:48 ` [patch V4 01/20] sched/mmcid: Revert the complex " Thomas Gleixner
2025-11-17 16:42 ` Mathieu Desnoyers
2025-11-16 20:48 ` [patch V4 02/20] sched/mmcid: Use proper data structures Thomas Gleixner
2025-11-16 20:48 ` [patch V4 03/20] sched/mmcid: Cacheline align MM CID storage Thomas Gleixner
2025-11-17 16:44 ` Mathieu Desnoyers
2025-11-16 20:48 ` [patch V4 04/20] sched: Fixup whitespace damage Thomas Gleixner
2025-11-17 16:45 ` Mathieu Desnoyers
2025-11-16 20:48 ` [patch V4 05/20] sched/mmcid: Move scheduler code out of global header Thomas Gleixner
2025-11-19 16:17 ` Yury Norov
2025-11-16 20:48 ` [patch V4 06/20] sched/mmcid: Prevent pointless work in mm_update_cpus_allowed() Thomas Gleixner
2025-11-16 20:48 ` [patch V4 07/20] cpumask: Introduce cpumask_weighted_or() Thomas Gleixner
2025-11-16 20:48 ` [patch V4 08/20] sched/mmcid: Use cpumask_weighted_or() Thomas Gleixner
2025-11-19 16:20 ` Yury Norov
2025-11-16 20:48 ` [patch V4 09/20] cpumask: Cache num_possible_cpus() Thomas Gleixner
2025-11-17 16:48 ` Mathieu Desnoyers [this message]
2025-11-18 4:36 ` Shrikanth Hegde
2025-11-16 20:48 ` [patch V4 10/20] sched/mmcid: Convert mm CID mask to a bitmap Thomas Gleixner
2025-11-17 16:51 ` Mathieu Desnoyers
2025-11-16 20:48 ` [patch V4 11/20] signal: Move MMCID exit out of sighand lock Thomas Gleixner
2025-11-17 16:53 ` Mathieu Desnoyers
2025-11-16 20:48 ` [patch V4 12/20] sched/mmcid: Move initialization out of line Thomas Gleixner
2025-11-16 20:48 ` [patch V4 13/20] sched/mmcid: Provide precomputed maximal value Thomas Gleixner
2025-11-17 16:59 ` Mathieu Desnoyers
2025-11-16 20:49 ` [patch V4 14/20] sched/mmcid: Serialize sched_mm_cid_fork()/exit() with a mutex Thomas Gleixner
2025-11-16 20:49 ` [patch V4 15/20] sched/mmcid: Introduce per task/CPU ownership infrastructure Thomas Gleixner
2025-11-17 19:05 ` Mathieu Desnoyers
2025-11-16 20:49 ` [patch V4 16/20] sched/mmcid: Provide new scheduler CID mechanism Thomas Gleixner
2025-11-17 19:40 ` Mathieu Desnoyers
2025-11-16 20:49 ` [patch V4 17/20] sched/mmcid: Provide CID ownership mode fixup functions Thomas Gleixner
2025-11-17 19:41 ` Mathieu Desnoyers
2025-11-16 20:49 ` [patch V4 18/20] irqwork: Move data struct to a types header Thomas Gleixner
2025-11-16 20:49 ` [patch V4 19/20] sched/mmcid: Implement deferred mode change Thomas Gleixner
2025-11-16 20:49 ` [patch V4 20/20] sched/mmcid: Switch over to the new mechanism Thomas Gleixner
2025-11-17 19:45 ` Mathieu Desnoyers
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