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From: "Liao, Chang" <liaochang1@huawei.com>
To: Will Deacon <will@kernel.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>,
	Oleg Nesterov <oleg@redhat.com>, <mhiramat@kernel.org>,
	<peterz@infradead.org>, <mark.rutland@arm.com>,
	<linux-kernel@vger.kernel.org>,
	<linux-trace-kernel@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH] arm64: uprobes: Optimize cache flushes for xol slot
Date: Mon, 23 Sep 2024 19:16:33 +0800	[thread overview]
Message-ID: <fac08b4b-6b64-44e6-4c67-e28945f5b763@huawei.com> (raw)
In-Reply-To: <20240923071856.GA31866@willie-the-truck>



在 2024/9/23 15:18, Will Deacon 写道:
> On Mon, Sep 23, 2024 at 09:57:14AM +0800, Liao, Chang wrote:
>> 在 2024/9/20 23:32, Catalin Marinas 写道:
>>> On Fri, Sep 20, 2024 at 04:58:31PM +0800, Liao, Chang wrote:
>>>> 在 2024/9/19 22:18, Oleg Nesterov 写道:
>>>>> On 09/19, Liao Chang wrote:
>>>>>> --- a/arch/arm64/kernel/probes/uprobes.c
>>>>>> +++ b/arch/arm64/kernel/probes/uprobes.c
>>>>>> @@ -17,12 +17,16 @@ void arch_uprobe_copy_ixol(struct page *page, unsigned long vaddr,
>>>>>>  	void *xol_page_kaddr = kmap_atomic(page);
>>>>>>  	void *dst = xol_page_kaddr + (vaddr & ~PAGE_MASK);
>>>>>>
>>>>>> +	if (!memcmp(dst, src, len))
>>>>>> +		goto done;
>>>>>
>>>>> can't really comment, I know nothing about arm64...
>>>>>
>>>>> but don't we need to change __create_xol_area()
>>>>>
>>>>> 	-	area->page = alloc_page(GFP_HIGHUSER);
>>>>> 	+	area->page = alloc_page(GFP_HIGHUSER | __GFP_ZERO);
>>>>>
>>>>> to avoid the false positives?
>>>>
>>>> Indeed, it would be safer.
>>>>
>>>> Could we tolerate these false positives? Even if the page are not reset
>>>> to zero bits, if the existing bits are the same as the instruction being
>>>> copied, it still can execute the correct instruction.
>>>
>>> Not if the I-cache has stale data. If alloc_page() returns a page with
>>> some random data that resembles a valid instruction but there was never
>>> a cache flush (sync_icache_aliases() on arm64), it's irrelevant whether
>>> the compare (on the D-cache side) succeeds or not.
>>
>> Absolutly right, I overlooked the comparsion is still performed in the D-cache.
>> However, the most important thing is ensuring the I-cache sees the accurate bits,
>> which is why a cache flush in necessary for each xol slot.
>>
>>>
>>> I think using __GFP_ZERO should do the trick. All 0s is a permanently
>>> undefined instruction, not something we'd use with xol.
>>
>> Unfortunately, the comparison assumes the D-cache and I-cache are already
>> in sync for the slot being copied. But this assumption is flawed if we start
>> with a page with some random bits and D-cache has not been sychronized with
>> I-cache. So, besides __GFP_ZERO, should we have a additional cache flush
>> after page allocation?
> 
> No, I think Oleg's right. The initial cache maintenance will happen when the
> executable pte is installed. However, we should use __GFP_ZERO anyway
> because I don't think it's a good idea to map an uninitialised page into
> userspace.

I will use __GFP_ZERO for xol page allocation in v2.

> 
> Will
> 

-- 
BR
Liao, Chang

  parent reply	other threads:[~2024-09-23 11:16 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-09-19 12:17 Liao Chang
2024-09-19 14:18 ` Oleg Nesterov
2024-09-20  8:58   ` Liao, Chang
2024-09-20 11:03     ` Oleg Nesterov
2024-09-20 15:32     ` Catalin Marinas
2024-09-20 17:32       ` Oleg Nesterov
2024-09-22 14:09         ` Will Deacon
2024-09-22 14:39           ` Oleg Nesterov
2024-09-23 11:16           ` Liao, Chang
2024-09-23  1:57       ` Liao, Chang
2024-09-23  7:18         ` Will Deacon
2024-09-23 10:52           ` Oleg Nesterov
2024-09-26 12:06             ` Liao, Chang
2024-09-26 16:08               ` Oleg Nesterov
2024-09-23 11:16           ` Liao, Chang [this message]
2024-09-23 16:03           ` Catalin Marinas
2024-11-06  9:55 ` Liao, Chang
2024-11-07 18:35   ` Catalin Marinas
2024-11-08 16:49 ` Catalin Marinas

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