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From: Kathiravan Thirumoorthy <kathiravan.thirumoorthy@oss.qualcomm.com>
To: Robert Marko <robert.marko@sartura.hr>,
	andersson@kernel.org, konradybcio@kernel.org,
	abelvesa@kernel.org, robh@kernel.org, krzk+dt@kernel.org,
	conor+dt@kernel.org, linux-arm-msm@vger.kernel.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Cc: luka.perkov@sartura.hr
Subject: Re: [PATCH] arm64: dts: qcom: ipq9574: add reset to SDHC
Date: Sun, 27 Sep 2026 19:31:07 +0530	[thread overview]
Message-ID: <fb7b898b-441b-41cf-89d3-1d513730a75c@oss.qualcomm.com> (raw)
In-Reply-To: <20260925191706.1579990-1-robert.marko@sartura.hr>


On 9/26/2026 12:46 AM, Robert Marko wrote:
> Add reset to SDHCI controller so it can be reset to avoid timeout issues
> after software reset due to bootloader set configuration.
>
> Signed-off-by: Robert Marko <robert.marko@sartura.hr>

Reviewed-by: Kathiravan Thirumoorthy 
<kathiravan.thirumoorthy@oss.qualcomm.com>

Thanks for submitting this. Similar change is needed for other IPQ SoCs 
which is in my TODO list. I will submit those changes in the coming weeks.

> ---
>   arch/arm64/boot/dts/qcom/ipq9574.dtsi | 1 +
>   1 file changed, 1 insertion(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/ipq9574.dtsi b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
> index 5a5bda5f21a11..ecafd4cda6e7a 100644
> --- a/arch/arm64/boot/dts/qcom/ipq9574.dtsi
> +++ b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
> @@ -471,6 +471,7 @@ sdhc_1: mmc@7804000 {
>   				 <&xo_board_clk>,
>   				 <&gcc GCC_SDCC1_ICE_CORE_CLK>;
>   			clock-names = "iface", "core", "xo", "ice";
> +			resets = <&gcc GCC_SDCC_BCR>;
>   			non-removable;
>   			supports-cqe;
>   			pinctrl-0 = <&sdc_default_state>;

  reply	other threads:[~2026-09-27 14:01 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-25 19:16 Robert Marko
2026-09-27 14:01 ` Kathiravan Thirumoorthy [this message]
2026-09-29  3:15 ` Bjorn Andersson

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