From: Aniruddha Banerjee <aniruddhab@nvidia.com>
To: "tglx@linutronix.de" <tglx@linutronix.de>,
Jonathan Hunter <jonathanh@nvidia.com>
Cc: "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"Thierry Reding" <treding@nvidia.com>,
Stephen Warren <swarren@nvidia.com>
Subject: [PATCH 1/1] irq: add IRQF_TRIGGER_MASK on PPI by default
Date: Thu, 30 Mar 2017 19:46:08 +0000 [thread overview]
Message-ID: <fe0774b2000848a6bd065efc649c6eab@bgmail102.nvidia.com> (raw)
add IRQF_TRIGGER_MASK on PPI by default so that the PPIs are
not configured as edge-triggered, which may be wrong for certain GIC
implementations such as the GIC-400
Signed-off-by: Aniruddha Banerjee <aniruddhab@nvidia.com>
---
kernel/irq/manage.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/kernel/irq/manage.c b/kernel/irq/manage.c
index 6b669593e7eb..9b2983cf9fd3 100644
--- a/kernel/irq/manage.c
+++ b/kernel/irq/manage.c
@@ -1982,7 +1982,7 @@ int request_percpu_irq(unsigned int irq, irq_handler_t handler,
return -ENOMEM;
action->handler = handler;
- action->flags = IRQF_PERCPU | IRQF_NO_SUSPEND;
+ action->flags = IRQF_PERCPU | IRQF_NO_SUSPEND | IRQF_TRIGGER_MASK;
action->name = devname;
action->percpu_dev_id = dev_id;
--
2.11.0
next reply other threads:[~2017-03-30 19:46 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-03-30 19:46 Aniruddha Banerjee [this message]
2017-03-31 8:01 ` Thomas Gleixner
2017-03-31 8:13 ` Jon Hunter
2017-03-31 8:16 ` Marc Zyngier
2017-03-31 12:07 ` Aniruddha Banerjee
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