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From: Vignesh Raghavendra <vigneshr@ti.com>
To: <Tudor.Ambarus@microchip.com>
Cc: <miquel.raynal@bootlin.com>, <richard@nod.at>,
	<Ashish.Kumar@nxp.com>, <linux-mtd@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>, <john.garry@huawei.com>
Subject: Re: [PATCH 3/3] mtd: spi-nor: Add USE_FSR flag for n25q* entries
Date: Thu, 12 Dec 2019 13:01:51 +0530	[thread overview]
Message-ID: <fec29113-e048-bd47-595e-3d1f6e3955e0@ti.com> (raw)
In-Reply-To: <2d931347-d927-4674-86ff-7eb285624bfc@microchip.com>

Hi Tudor,

On 10/12/19 10:11 pm, Tudor.Ambarus@microchip.com wrote:
> Hi, Vignesh,
> 
> On 12/5/19 8:59 AM, Vignesh Raghavendra wrote:
>> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>>
>> Add USE_FSR flag to all variants of n25q entries that support Flag Status
>> Register.
> 
> On a first look, all Micron flashes define the Flag Status Register. Do you know
> if there are any Micron flash that don't support FSR? If not, would you be
> interested in doing some documentation work to check this?
> 

n25q and mt25 series support FSR but older m25p/m45p parts don't have
FSR.  I don't know any easy way of finding out if flash part is m25p type.

> I think we can do this more generic, always set SNOR_F_USE_FSR for micron
> flashes, like below. More, if FSR is specific just for Micron, we can get rid of
> the USE_FSR flag too.
> 

AFAIK, FSR is definitely Micron specific (other flash vendors have
different registers/bits providing similar information though).


> Thanks, Vignesh.
> 
> diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
> index f4afe123e9dc..fe10beea60c3 100644
> --- a/drivers/mtd/spi-nor/spi-nor.c
> +++ b/drivers/mtd/spi-nor/spi-nor.c
> @@ -4595,7 +4595,7 @@ static void sst_set_default_init(struct spi_nor *nor)
> 
>  static void st_micron_set_default_init(struct spi_nor *nor)
>  {
> -       nor->flags |= SNOR_F_HAS_LOCK;
> +       nor->flags |= SNOR_F_HAS_LOCK | SNOR_F_USE_FSR;
>         nor->params.quad_enable = NULL;
>         nor->params.set_4byte = st_micron_set_4byte;
>  }
> 

-- 
Regards
Vignesh

  reply	other threads:[~2019-12-12  7:32 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-12-05  6:59 [PATCH 0/3] mtd: spi-nor: Update mt25q/n25q entries Vignesh Raghavendra
2019-12-05  6:59 ` [PATCH 1/3] mtd: spi-nor: Split mt25qu512a (n25q512a) entry into two Vignesh Raghavendra
2019-12-05  7:24   ` [EXT] " Ashish Kumar
2019-12-06  9:32     ` Vignesh Raghavendra
2019-12-05  6:59 ` [PATCH 2/3] mtd: spi-nor: Add entries for mt25q variants Vignesh Raghavendra
2019-12-05  6:59 ` [PATCH 3/3] mtd: spi-nor: Add USE_FSR flag for n25q* entries Vignesh Raghavendra
2019-12-05 11:21   ` John Garry
2019-12-10 16:41   ` Tudor.Ambarus
2019-12-12  7:31     ` Vignesh Raghavendra [this message]
2019-12-24  9:05 ` [PATCH 0/3] mtd: spi-nor: Update mt25q/n25q entries Tudor.Ambarus

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