[PATCH 0/3] Some improvements for SM6350 & Fairphone 4

[PATCH 0/3] Some improvements for SM6350 & Fairphone 4

[Luca Weiss]

Add a few missing interconnect paths, the pil-reloc region in IMEM and
correct the node name of the simple-framebuffer node.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
---
Luca Weiss (3):
      arm64: dts: qcom: sm6350: Add interconnects for GPU, MPSS & CDSP
      arm64: dts: qcom: sm6350: Add PIL info region
      arm64: dts: qcom: sm7225-fairphone-fp4: Fix address in fb node name

 arch/arm64/boot/dts/qcom/sm6350.dtsi              | 14 ++++++++++++++
 arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts |  2 +-
 2 files changed, 15 insertions(+), 1 deletion(-)
---
base-commit: 9e0898f1c0f134c6bad146ca8578f73c3e40ac0a
change-id: 20260505-sm6350-misc-a0c3b9407f32

Best regards,
--  
Luca Weiss <luca.weiss@fairphone.com>

[PATCH 1/3] arm64: dts: qcom: sm6350: Add interconnects for GPU, MPSS & CDSP

[Luca Weiss]

Add some interconnect paths for the GPU, the MPSS (modem) and CDSP.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
---
 arch/arm64/boot/dts/qcom/sm6350.dtsi | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi
index 034545d2af2d..f37096cf11d6 100644
--- a/arch/arm64/boot/dts/qcom/sm6350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi
@@ -1461,6 +1461,9 @@ gpu: gpu@3d00000 {
 			iommus = <&adreno_smmu 0>;
 			operating-points-v2 = <&gpu_opp_table>;
 			qcom,gmu = <&gmu>;
+			interconnects = <&gem_noc MASTER_GRAPHICS_3D QCOM_ICC_TAG_ALWAYS
+					 &clk_virt SLAVE_EBI_CH0 QCOM_ICC_TAG_ALWAYS>;
+			interconnect-names = "gfx-mem";
 			nvmem-cells = <&gpu_speed_bin>;
 			nvmem-cell-names = "speed_bin";
 			#cooling-cells = <2>;
@@ -1622,6 +1625,9 @@ mpss: remoteproc@4080000 {
 					<&rpmhpd SM6350_MSS>;
 			power-domain-names = "cx", "mss";
 
+			interconnects = <&clk_virt MASTER_LLCC QCOM_ICC_TAG_ALWAYS
+					 &clk_virt SLAVE_EBI_CH0 QCOM_ICC_TAG_ALWAYS>;
+
 			memory-region = <&pil_modem_mem>;
 
 			qcom,qmp = <&aoss_qmp>;
@@ -1661,6 +1667,9 @@ cdsp: remoteproc@8300000 {
 					<&rpmhpd SM6350_MX>;
 			power-domain-names = "cx", "mx";
 
+			interconnects = <&compute_noc MASTER_NPU QCOM_ICC_TAG_ALWAYS
+					 &compute_noc SLAVE_CDSP_GEM_NOC QCOM_ICC_TAG_ALWAYS>;
+
 			memory-region = <&pil_cdsp_mem>;
 
 			qcom,qmp = <&aoss_qmp>;

-- 
2.54.0

Re: [PATCH 1/3] arm64: dts: qcom: sm6350: Add interconnects for GPU, MPSS & CDSP

[Konrad Dybcio]

On 5/5/26 5:08 PM, Luca Weiss wrote:
> Add some interconnect paths for the GPU, the MPSS (modem) and CDSP.
> 
> Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
> ---

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>

Konrad

[PATCH 2/3] arm64: dts: qcom: sm6350: Add PIL info region

[Luca Weiss]

Define the PIL relocation info region, so that post mortem tools will be
able to locate the loaded remoteprocs.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
---
 arch/arm64/boot/dts/qcom/sm6350.dtsi | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi
index f37096cf11d6..7cb9ade1f0c8 100644
--- a/arch/arm64/boot/dts/qcom/sm6350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi
@@ -2754,6 +2754,11 @@ sram@14680000 {
 			ipa_modem_tables: modem-tables@28000 {
 				reg = <0x28000 0x2000>;
 			};
+
+			pil-reloc@2a94c {
+				compatible = "qcom,pil-reloc-info";
+				reg = <0x2a94c 0xc8>;
+			};
 		};
 
 		apps_smmu: iommu@15000000 {

-- 
2.54.0

Re: [PATCH 2/3] arm64: dts: qcom: sm6350: Add PIL info region

[Konrad Dybcio]

On 5/5/26 5:08 PM, Luca Weiss wrote:
> Define the PIL relocation info region, so that post mortem tools will be
> able to locate the loaded remoteprocs.
> 
> Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
> ---

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>

Konrad

[PATCH 3/3] arm64: dts: qcom: sm7225-fairphone-fp4: Fix address in fb node name

[Luca Weiss]

'reg' is 0xa0000000 so the node name is missing a zero. Add it, so that
the reg and address in the node name matches.

No functional impact.

Fixes: 4cbea668767d ("arm64: dts: qcom: sm7225: Add device tree for Fairphone 4")
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
---
 arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts b/arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts
index 3964aae47fd4..96afa42ecac8 100644
--- a/arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts
+++ b/arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts
@@ -48,7 +48,7 @@ chosen {
 
 		stdout-path = "serial0:115200n8";
 
-		framebuffer0: framebuffer@a000000 {
+		framebuffer0: framebuffer@a0000000 {
 			compatible = "simple-framebuffer";
 			reg = <0 0xa0000000 0 (2340 * 1080 * 4)>;
 			width = <1080>;

-- 
2.54.0

Re: [PATCH 3/3] arm64: dts: qcom: sm7225-fairphone-fp4: Fix address in fb node name

[Konrad Dybcio]

On 5/5/26 5:08 PM, Luca Weiss wrote:
> 'reg' is 0xa0000000 so the node name is missing a zero. Add it, so that
> the reg and address in the node name matches.
> 
> No functional impact.
> 
> Fixes: 4cbea668767d ("arm64: dts: qcom: sm7225: Add device tree for Fairphone 4")
> Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
> ---

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>

Konrad

Re: [PATCH 0/3] Some improvements for SM6350 & Fairphone 4

[Bjorn Andersson]

On Tue, 05 May 2026 17:08:32 +0200, Luca Weiss wrote:
> Add a few missing interconnect paths, the pil-reloc region in IMEM and
> correct the node name of the simple-framebuffer node.
> 
> 

Applied, thanks!

[1/3] arm64: dts: qcom: sm6350: Add interconnects for GPU, MPSS & CDSP
      commit: cc62a79bfa39e057c73828c1ed369b63d832edca
[2/3] arm64: dts: qcom: sm6350: Add PIL info region
      commit: edda2a710b87fd49bd991895f34195b6ea37e286
[3/3] arm64: dts: qcom: sm7225-fairphone-fp4: Fix address in fb node name
      commit: f6e65005fe55c3d09287851523de06367cbf0bc2

Best regards,
-- 
Bjorn Andersson <andersson@kernel.org>