Re: [PATCH v2 7/7] arm64: dts: qcom: lemans: Enable lemans-sa8255p-ride board support

[Shazad Hussain <shazad.hussain@oss.qualcomm.com>]

On 10/20/2026 5:46 PM, Konrad Dybcio wrote:
> On 10/15/26 4:37 AM, Shawn Guo wrote:
>> From: Nikunj Kela <quic_nkela@quicinc.com>
>>
>> Add initial device tree support for the Lemans SA8255P Ride board. Enable
>> UFS storage, UART10 as the serial console, PCIe EP interfaces, thermal
>> zones for PMM8654AU sensors, and SCMI protocol nodes.
>>
>> Co-developed-by: Shazad Hussain <shazad.hussain@oss.qualcomm.com>
>> Signed-off-by: Shazad Hussain <shazad.hussain@oss.qualcomm.com>
>> Signed-off-by: Nikunj Kela <quic_nkela@quicinc.com>
>> Co-developed-by: Deepti Jaggi <deepti.jaggi@oss.qualcomm.com>
>> Signed-off-by: Deepti Jaggi <deepti.jaggi@oss.qualcomm.com>
>> Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
>> Signed-off-by: Shawn Guo <shengchao.guo@oss.qualcomm.com>
>> ---
> 
> [...]
> 
>> +	thermal-zones {
>> +		pmm8654au_0_thermal: pm8255-0-thermal {
>> +			polling-delay-passive = <100>;
> 
> Do we need the polling, is there no interrupt?
> 
> [...]
> 
> 
>> +&pcie0_ep {
>> +	pinctrl-names = "default";
>> +	pinctrl-0 = <&pcie0_ep_clkreq_default &pcie0_ep_perst_default
>> +		    &pcie0_ep_wake_default>;
>> +	reset-gpios = <&tlmm 2 GPIO_ACTIVE_LOW>;
>> +	wake-gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>;
> 
> This GPIO reference feels like a layering violation - the previous
> commit promised TLMM is abstracted away

Hi Konard,

For PCIe EP, the TLMM gpio's are controlled via kernel and are not 
abstracted. Possibly we need to reserve them for kernel only.

-Shazad

> 
> Konrad