From: Florian Fainelli <f.fainelli@gmail.com>
To: "Maciej W. Rozycki" <macro@orcam.me.uk>
Cc: linux-mips@vger.kernel.org,
"Thomas Bogendoerfer" <tsbogend@alpha.franken.de>,
"Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"open list" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v2] MIPS: Cobalt: Include legacy IDE ports in the PCI I/O window
Date: Sun, 25 Oct 2026 12:16:20 -0700 [thread overview]
Message-ID: <ff0e6a32-af88-432b-a976-2a432f625cb2@gmail.com> (raw)
In-Reply-To: <alpine.DEB.2.21.2610250247210.42255@angie.orcam.me.uk>
On 10/24/2026 7:55 PM, Maciej W. Rozycki wrote:
> On Thu, 22 Oct 2026, Florian Fainelli wrote:
>
>> Changes in v2:
>>
>> - implement Maciej's suggestion to reserve PCI resources first
>> and then the rest of the peripherals
>
> Thanks.
>
>> diff --git a/arch/mips/cobalt/pci.c b/arch/mips/cobalt/pci.c
>> index 85ec9cc31d66..29fd052766b2 100644
>> --- a/arch/mips/cobalt/pci.c
>> +++ b/arch/mips/cobalt/pci.c
>> @@ -14,6 +14,8 @@
>>
>> #include <asm/gt64120.h>
>>
>> +#include <cobalt.h>
>> +
>
> Hmm, why do you need it here now, a leftover from testing?
Yes indeed it was a leftover from moving code around until I settled on
the current approach.
>
> With that removed, unless proved otherwise:
>
> Reviewed-by: Maciej W. Rozycki <macro@orcam.me.uk>
Thanks v3 incoming.
--
Florian
next prev parent reply other threads:[~2026-10-25 19:16 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-22 16:31 Florian Fainelli
2026-10-25 2:55 ` Maciej W. Rozycki
2026-10-25 19:16 ` Florian Fainelli [this message]
2026-10-25 19:19 ` Florian Fainelli
2026-10-26 4:38 ` Maciej W. Rozycki
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