From: Florian Fainelli <f.fainelli@gmail.com>
To: Timur Tabi <timur@codeaurora.org>, linux-arm-kernel@lists.infradead.org
Cc: tchalamarla@cavium.com, rrichter@cavium.com, opendmb@gmail.com,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will.deacon@arm.com>,
Mark Rutland <mark.rutland@arm.com>,
open list <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH] arm64: Make L1_CACHE_SHIFT configurable
Date: Mon, 12 Feb 2018 15:57:29 -0800 [thread overview]
Message-ID: <ffc090d5-62c9-e608-32e2-8d13d01234e6@gmail.com> (raw)
In-Reply-To: <ca6c47f9-86df-bcdb-bbe1-eac9db68ec33@codeaurora.org>
On 02/12/2018 03:52 PM, Timur Tabi wrote:
> On 02/12/2018 05:45 PM, Florian Fainelli wrote:
>> +config ARM64_L1_CACHE_SHIFT
>> + int
>> + default 7 if ARM64_L1_CACHE_SHIFT_7
>> + default 6
>
> Shouldn't this be the other way around? Everyone is used to 7 now, so
> you're changing the default back to 6. I would think that it should be
> 7 by default, and platforms like Brahma-B53 should force it to 6.
That is debatable, is there a good publicly available table of what the
typical L1 cache line size is on ARMv8 platforms?
--
Florian
next prev parent reply other threads:[~2018-02-12 23:57 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-02-12 23:45 Florian Fainelli
2018-02-12 23:52 ` Timur Tabi
2018-02-12 23:57 ` Florian Fainelli [this message]
2018-02-13 0:10 ` Timur Tabi
2018-02-13 0:17 ` Florian Fainelli
2018-02-19 23:46 ` Jon Masters
2018-02-13 11:57 ` Catalin Marinas
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