inw/outw performance

inw/outw performance

[Filipau, Ihar]

Hello All!

  [ please CC me - I'm not subscribed ]

  [ do not know where else to send - so it goes here,
    I hope some-one more qualified can advice something ]

  I have a little question which comes down to two little 
  CPU instructions - inw/outw.

  I have a proprietary PCI board (PMD MC2140 motion controller with PLX).
  I have wrote device driver for it (heap of ioctl()s - not more).

  Now my company investigates possibilities to go to high-performance 
  market - and I have hit the problem with performance.

  Communication with controller (sending of the command and reading back 
  response) looks like this:

    outw(cmd_port, command);
    while( !(inw(status_port)&READY) );
    outw(data_port, param1);
    while( !(inw(status_port)&READY) );
    outw(data_port, param2);
    while( !(inw(status_port)&READY) );
    ...
    outw(data_port, paramN);
    while( !(inw(status_port)&COMMAND_DONE) );

    resp_data1 = inw(data_port);
    while( !(inw(status_port)&READY) );
    ...
    resp_dataM = inw(data_port);
    while( !(inw(status_port)&READY) );
 
  And actually what I have found that on my development P3/1GHz system
  every inw() takes more that 3us. I wasn't measuring outw() yet - but 
  I do not expect its timing to be better.

  Whole communication sequence on average takes ~55us. I need to execute 
  tens of commands for every user request - and time goes to some hefty 
  3millis just to program motion controller. And on deployment (embedded) 
  platform this is going to be even worse.

  Okay. Our motion controller has 20MHz clock inside. So for every 50 
  cycles of CPU I have only 1 cycle of motion controller. 3us ~ 1k
  commands of CPU, and at top 20MHz/3us == 6,(6) commands of motion 
  controller.

  Am I right in my calculations? I have hit the limit of our device 
  bandwidth?
  Is there any other way to communicate over PCI bus with controller?
  - I can ask our hw enginers to implement something, if there is something
  possible to implement to improve performance.

  I'm using interrupt-driven IO to communicate with user space. I have 
  to execute several commands with motion controller: and it takes 200-400us

  just to clear interrupt state of motion controller - Is it okay timing for

  interrupt handler? Or should I try move stuff to BH or something like
this?

  Thanks in advance.

--- Regards&Wishes! With respect  Ihar "Philips" Filipau, Phil for friends

- - - - - - - - - - - - - - - - - - - - - - - - -
MCS/Mathematician - System Programmer
Ihar Filipau 
Software entwickler @ SUSS MicroTec Test Systems GmbH, 
Suss-Strasse 1, D-01561 Sacka (bei Dresden)
e-mail: ifilipau@sussdd.de  tel: +49-(0)-352-4073-327
fax: +49-(0)-352-4073-700   web: http://www.suss.com/

Re: inw/outw performance

[Pavel Machek]

Hi!

>   And actually what I have found that on my development P3/1GHz system
>   every inw() takes more that 3us. I wasn't measuring outw() yet - but 
>   I do not expect its timing to be better.

inw/outw *is* slow. Memory map your
registers to speed it up.
-- 
				Pavel
Written on sharp zaurus, because my Velo1 broke. If you have Velo you don't need...

Re: inw/outw performance

[Jonathan Lundell]

At 7:23pm +0200 3/30/03, Pavel Machek wrote:
>  >   And actually what I have found that on my development P3/1GHz system
>>    every inw() takes more that 3us. I wasn't measuring outw() yet - but
>>    I do not expect its timing to be better.
>
>inw/outw *is* slow. Memory map your
>registers to speed it up.

Shouldn't be *that* slow, though, especially over PCI, unless the 
device in question is taking that long to respond--in which case 
memory mapping won't help.
-- 
/Jonathan Lundell.

RE: inw/outw performance

[Filipau, Ihar]

Hello All!

  Thanks every-one for your replies - it was really helpful.
  I gave our HW guys more job ;-)

  The only question I have left - and what is really more 
  linux-kernel related: is it okay to have ~200-400us IRQs
  disabled? I cannot effectively clear interrupt on device 
   - but I can disable interrupt on our PCI bridge, and later 
  in BH, after clearing irq on device, reenable irq line on
  bridge.

2Linux@Horizon: home of PLX PCI 9052 - www.plxtech.com
                PCI bridge for custom devices.

2Pavel: got not response - looks like you have enough of your 
        own unemployed ;-)

--- Regards&Wishes! With respect  Ihar "Philips" Filipau, and Phil for
friends

- - - - - - - - - - - - - - - - - - - - - - - - -
MCS/Mathematician - System Programmer
Ihar Filipau 
Software entwickler @ SUSS MicroTec Test Systems GmbH, 
Suss-Strasse 1, D-01561 Sacka (bei Dresden)
e-mail: ifilipau@sussdd.de  tel: +49-(0)-352-4073-327
fax: +49-(0)-352-4073-700   web: http://www.suss.com/