Re: question on i386 very early memory detection cleanup patch

["Jan Beulich" <JBeulich@novell.com>]

If you refer to the 4G/4G split patch - this isn't part of mainline, and
if it needs it would seem it should do this adjustment, not an unrelated
patch. Jan

>>> "H. Peter Anvin" <hpa@zytor.com> 01.09.04 18:20:01 >>>
Jan Beulich wrote:
> Is there a particular reason why this patch changes the alignment of
> cpu_gdt_table to be page rather than cache line aligned? This is
> particulary strange to me because the alignment is guaranteed only
for
> the boot processor, but not for any of the APs; for the latter ones
> there isn't even a string guarantee that the table would be cache
line
> aligned (which it really should be); the weak guarantee only is
through
> an appearant assumption of GDT_ENTRIES being a sufficiently large
power
> of two.
> 
> Thanks, Jan

The 4+4 GB patch apparently needs it.