[PATCH v10 13/15] arm_mpam: Identify the non-aliasing controls

[PATCH v10 13/15] arm_mpam: Identify the non-aliasing controls

[Jinjie Ruan]

From: Jinjie Ruan <ruanjinjie@huawei.com>

A non-aliasing control can't be presented by writing the same value to
several PARTIDs, because its value is additive. This is used later to
decide whether a class's non-aliasing controls must be dropped before
its PARTIDs can be used as separate monitoring groups.

A control that aliases shares the resource, so writing the same value to
each PARTID keeps its meaning. Several PARTIDs that map onto one
internal PARTID are configured as one, so a class that implements
narrowing does not have this problem.

Cc: James Morse <james.morse@arm.com>
Cc: Ben Horgan <ben.horgan@arm.com>
Cc: Reinette Chatre <reinette.chatre@intel.com>
Cc: Fenghua Yu <fenghuay@nvidia.com>
Suggested-by: James Morse <james.morse@arm.com>
Signed-off-by: Jinjie Ruan <ruanjinjie@huawei.com>
---
v9->v10:
 - Include mpam_feat_cmax_cassoc in the non-aliasing controls
---
 drivers/resctrl/mpam_internal.h | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

diff --git a/drivers/resctrl/mpam_internal.h b/drivers/resctrl/mpam_internal.h
index 5a7590568a05..a4f2fdf7ac95 100644
--- a/drivers/resctrl/mpam_internal.h
+++ b/drivers/resctrl/mpam_internal.h
@@ -221,6 +221,25 @@ struct mpam_props {
 #define mpam_set_feature(_feat, x)	__set_bit(_feat, (x)->features)
 #define mpam_clear_feature(_feat, x)	__clear_bit(_feat, (x)->features)
 
+/*
+ * A non-aliasing control (e.g. a cache capacity) can't be presented by
+ * writing the same value to several PARTIDs: its value is additive, two 50%
+ * values add up to 100%. An aliasing control (e.g. a cache portion bitmap)
+ * shares the resource, so the same value written to each PARTID keeps its
+ * meaning.
+ */
+static inline bool
+mpam_props_has_non_aliasing_controls(const struct mpam_props *props)
+{
+	return mpam_has_feature(mpam_feat_mbw_max, props) ||
+	       mpam_has_feature(mpam_feat_mbw_min, props) ||
+	       mpam_has_feature(mpam_feat_mbw_prop, props) ||
+	       mpam_has_feature(mpam_feat_cmax_cmax, props) ||
+	       mpam_has_feature(mpam_feat_cmax_cmin, props) ||
+	       mpam_has_feature(mpam_feat_cmax_cassoc, props) ||
+	       mpam_has_feature(mpam_feat_cmax_softlim, props);
+}
+
 /* Workaround bits for msc->quirks */
 enum mpam_device_quirks {
 	T241_SCRUB_SHADOW_REGS,
-- 
2.43.0

Re: [PATCH v10 13/15] arm_mpam: Identify the non-aliasing controls

[Jinjie Ruan]

This patch is part of the v10 series. For the main thread, see:

https://lore.kernel.org/all/tencent_28FE31D80A7A9AEEC43B22D0AD8894E30C06@qq.com/#t

在 2026/10/19 15:46, Jinjie Ruan 写道:
> From: Jinjie Ruan <ruanjinjie@huawei.com>
>
> A non-aliasing control can't be presented by writing the same value to
> several PARTIDs, because its value is additive. This is used later to
> decide whether a class's non-aliasing controls must be dropped before
> its PARTIDs can be used as separate monitoring groups.
>
> A control that aliases shares the resource, so writing the same value to
> each PARTID keeps its meaning. Several PARTIDs that map onto one
> internal PARTID are configured as one, so a class that implements
> narrowing does not have this problem.
>
> Cc: James Morse <james.morse@arm.com>
> Cc: Ben Horgan <ben.horgan@arm.com>
> Cc: Reinette Chatre <reinette.chatre@intel.com>
> Cc: Fenghua Yu <fenghuay@nvidia.com>
> Suggested-by: James Morse <james.morse@arm.com>
> Signed-off-by: Jinjie Ruan <ruanjinjie@huawei.com>
> ---
> v9->v10:
>   - Include mpam_feat_cmax_cassoc in the non-aliasing controls
> ---
>   drivers/resctrl/mpam_internal.h | 19 +++++++++++++++++++
>   1 file changed, 19 insertions(+)
>
> diff --git a/drivers/resctrl/mpam_internal.h b/drivers/resctrl/mpam_internal.h
> index 5a7590568a05..a4f2fdf7ac95 100644
> --- a/drivers/resctrl/mpam_internal.h
> +++ b/drivers/resctrl/mpam_internal.h
> @@ -221,6 +221,25 @@ struct mpam_props {
>   #define mpam_set_feature(_feat, x)	__set_bit(_feat, (x)->features)
>   #define mpam_clear_feature(_feat, x)	__clear_bit(_feat, (x)->features)
>   
> +/*
> + * A non-aliasing control (e.g. a cache capacity) can't be presented by
> + * writing the same value to several PARTIDs: its value is additive, two 50%
> + * values add up to 100%. An aliasing control (e.g. a cache portion bitmap)
> + * shares the resource, so the same value written to each PARTID keeps its
> + * meaning.
> + */
> +static inline bool
> +mpam_props_has_non_aliasing_controls(const struct mpam_props *props)
> +{
> +	return mpam_has_feature(mpam_feat_mbw_max, props) ||
> +	       mpam_has_feature(mpam_feat_mbw_min, props) ||
> +	       mpam_has_feature(mpam_feat_mbw_prop, props) ||
> +	       mpam_has_feature(mpam_feat_cmax_cmax, props) ||
> +	       mpam_has_feature(mpam_feat_cmax_cmin, props) ||
> +	       mpam_has_feature(mpam_feat_cmax_cassoc, props) ||
> +	       mpam_has_feature(mpam_feat_cmax_softlim, props);
> +}
> +
>   /* Workaround bits for msc->quirks */
>   enum mpam_device_quirks {
>   	T241_SCRUB_SHADOW_REGS,