From: tip-bot for Andi Kleen <tipbot@zytor.com>
To: linux-tip-commits@vger.kernel.org
Cc: hpa@zytor.com, ak@linux.intel.com, linux-kernel@vger.kernel.org,
mingo@kernel.org, peterz@infradead.org, tglx@linutronix.de,
acme@kernel.org
Subject: [tip:perf/core] perf/x86/intel: Use INTEL_FLAGS_UEVENT_CONSTRAINT for PRECDIST
Date: Sun, 16 Nov 2014 04:35:10 -0800 [thread overview]
Message-ID: <tip-0dbc94796d8714f78446245ef0f080d2c0b7ff0e@git.kernel.org> (raw)
In-Reply-To: <1411569288-5627-2-git-send-email-andi@firstfloor.org>
Commit-ID: 0dbc94796d8714f78446245ef0f080d2c0b7ff0e
Gitweb: http://git.kernel.org/tip/0dbc94796d8714f78446245ef0f080d2c0b7ff0e
Author: Andi Kleen <ak@linux.intel.com>
AuthorDate: Wed, 24 Sep 2014 07:34:47 -0700
Committer: Ingo Molnar <mingo@kernel.org>
CommitDate: Sun, 16 Nov 2014 11:41:55 +0100
perf/x86/intel: Use INTEL_FLAGS_UEVENT_CONSTRAINT for PRECDIST
My earlier commit:
86a04461a99f ("perf/x86: Revamp PEBS event selection")
made nearly all PEBS on Sandy/IvyBridge/Haswell to reject non zero flags.
However this wasn't done for the INST_RETIRED.PREC_DIST event
because no suitable macro existed. Now that we have
INTEL_FLAGS_UEVENT_CONSTRAINT enforce zero flags for
INST_RETIRED.PREC_DIST too.
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Arnaldo Carvalho de Melo <acme@kernel.org>
Link: http://lkml.kernel.org/r/1411569288-5627-2-git-send-email-andi@firstfloor.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
---
arch/x86/kernel/cpu/perf_event_intel_ds.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/x86/kernel/cpu/perf_event_intel_ds.c b/arch/x86/kernel/cpu/perf_event_intel_ds.c
index 46211bc..12fe1dc 100644
--- a/arch/x86/kernel/cpu/perf_event_intel_ds.c
+++ b/arch/x86/kernel/cpu/perf_event_intel_ds.c
@@ -606,7 +606,7 @@ struct event_constraint intel_westmere_pebs_event_constraints[] = {
};
struct event_constraint intel_snb_pebs_event_constraints[] = {
- INTEL_UEVENT_CONSTRAINT(0x01c0, 0x2), /* INST_RETIRED.PRECDIST */
+ INTEL_FLAGS_UEVENT_CONSTRAINT(0x01c0, 0x2), /* INST_RETIRED.PRECDIST */
INTEL_PLD_CONSTRAINT(0x01cd, 0x8), /* MEM_TRANS_RETIRED.LAT_ABOVE_THR */
INTEL_PST_CONSTRAINT(0x02cd, 0x8), /* MEM_TRANS_RETIRED.PRECISE_STORES */
/* UOPS_RETIRED.ALL, inv=1, cmask=16 (cycles:p). */
@@ -617,7 +617,7 @@ struct event_constraint intel_snb_pebs_event_constraints[] = {
};
struct event_constraint intel_ivb_pebs_event_constraints[] = {
- INTEL_UEVENT_CONSTRAINT(0x01c0, 0x2), /* INST_RETIRED.PRECDIST */
+ INTEL_FLAGS_UEVENT_CONSTRAINT(0x01c0, 0x2), /* INST_RETIRED.PRECDIST */
INTEL_PLD_CONSTRAINT(0x01cd, 0x8), /* MEM_TRANS_RETIRED.LAT_ABOVE_THR */
INTEL_PST_CONSTRAINT(0x02cd, 0x8), /* MEM_TRANS_RETIRED.PRECISE_STORES */
/* UOPS_RETIRED.ALL, inv=1, cmask=16 (cycles:p). */
@@ -628,7 +628,7 @@ struct event_constraint intel_ivb_pebs_event_constraints[] = {
};
struct event_constraint intel_hsw_pebs_event_constraints[] = {
- INTEL_UEVENT_CONSTRAINT(0x01c0, 0x2), /* INST_RETIRED.PRECDIST */
+ INTEL_FLAGS_UEVENT_CONSTRAINT(0x01c0, 0x2), /* INST_RETIRED.PRECDIST */
INTEL_PLD_CONSTRAINT(0x01cd, 0xf), /* MEM_TRANS_RETIRED.* */
/* UOPS_RETIRED.ALL, inv=1, cmask=16 (cycles:p). */
INTEL_FLAGS_EVENT_CONSTRAINT(0x108001c2, 0xf),
next prev parent reply other threads:[~2014-11-16 12:35 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-09-24 14:34 [PATCH 1/3] perf, x86: Add INTEL_FLAGS_UEVENT_CONSTRAINT Andi Kleen
2014-09-24 14:34 ` [PATCH 2/3] perf, x86: Use INTEL_FLAGS_UEVENT_CONSTRAINT for PRECDIST Andi Kleen
2014-11-16 12:35 ` tip-bot for Andi Kleen [this message]
2014-09-24 14:34 ` [PATCH 3/3] perf, x86: Disallow flags for most Core2/Atom/Nehalem/Westmere events Andi Kleen
2014-11-16 12:35 ` [tip:perf/core] perf/x86/intel: Disallow flags for most Core2/ Atom/Nehalem/Westmere events tip-bot for Andi Kleen
2014-09-25 9:25 ` [PATCH 1/3] perf, x86: Add INTEL_FLAGS_UEVENT_CONSTRAINT Peter Zijlstra
2014-11-16 12:34 ` [tip:perf/core] perf/x86: " tip-bot for Andi Kleen
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