From: tip-bot for Andi Kleen <tipbot@zytor.com>
To: linux-tip-commits@vger.kernel.org
Cc: kan.liang@intel.com, maria.n.dimakopoulou@gmail.com,
linux-kernel@vger.kernel.org, eranian@google.com,
mingo@kernel.org, peterz@infradead.org, ak@linux.intel.com,
junk@eslaf.co.uk, tglx@linutronix.de, hpa@zytor.com
Subject: [tip:perf/core] perf/x86: Add INTEL_FLAGS_UEVENT_CONSTRAINT
Date: Sun, 16 Nov 2014 04:34:52 -0800 [thread overview]
Message-ID: <tip-7550ddffe4c8040db31c66e5bd64531e2916bbf1@git.kernel.org> (raw)
In-Reply-To: <1411569288-5627-1-git-send-email-andi@firstfloor.org>
Commit-ID: 7550ddffe4c8040db31c66e5bd64531e2916bbf1
Gitweb: http://git.kernel.org/tip/7550ddffe4c8040db31c66e5bd64531e2916bbf1
Author: Andi Kleen <ak@linux.intel.com>
AuthorDate: Wed, 24 Sep 2014 07:34:46 -0700
Committer: Ingo Molnar <mingo@kernel.org>
CommitDate: Sun, 16 Nov 2014 11:41:54 +0100
perf/x86: Add INTEL_FLAGS_UEVENT_CONSTRAINT
Add a FLAGS_UEVENT_CONSTRAINT macro that allows us to
match on event+umask, and in additional all flags.
This is needed to ensure the INV and CMASK fields
are zero for specific events, as this can cause undefined
behavior.
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Kan Liang <kan.liang@intel.com>
Cc: Maria Dimakopoulou <maria.n.dimakopoulou@gmail.com>
Cc: Mark Davies <junk@eslaf.co.uk>
Cc: Stephane Eranian <eranian@google.com>
Link: http://lkml.kernel.org/r/1411569288-5627-1-git-send-email-andi@firstfloor.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
---
arch/x86/kernel/cpu/perf_event.h | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/x86/kernel/cpu/perf_event.h b/arch/x86/kernel/cpu/perf_event.h
index fc5eb39..4e6cdb0 100644
--- a/arch/x86/kernel/cpu/perf_event.h
+++ b/arch/x86/kernel/cpu/perf_event.h
@@ -253,6 +253,10 @@ struct cpu_hw_events {
#define INTEL_UEVENT_CONSTRAINT(c, n) \
EVENT_CONSTRAINT(c, n, INTEL_ARCH_EVENT_MASK)
+/* Like UEVENT_CONSTRAINT, but match flags too */
+#define INTEL_FLAGS_UEVENT_CONSTRAINT(c, n) \
+ EVENT_CONSTRAINT(c, n, INTEL_ARCH_EVENT_MASK|X86_ALL_EVENT_FLAGS)
+
#define INTEL_PLD_CONSTRAINT(c, n) \
__EVENT_CONSTRAINT(c, n, INTEL_ARCH_EVENT_MASK|X86_ALL_EVENT_FLAGS, \
HWEIGHT(n), 0, PERF_X86_EVENT_PEBS_LDLAT)
prev parent reply other threads:[~2014-11-16 12:35 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-09-24 14:34 [PATCH 1/3] perf, x86: " Andi Kleen
2014-09-24 14:34 ` [PATCH 2/3] perf, x86: Use INTEL_FLAGS_UEVENT_CONSTRAINT for PRECDIST Andi Kleen
2014-11-16 12:35 ` [tip:perf/core] perf/x86/intel: " tip-bot for Andi Kleen
2014-09-24 14:34 ` [PATCH 3/3] perf, x86: Disallow flags for most Core2/Atom/Nehalem/Westmere events Andi Kleen
2014-11-16 12:35 ` [tip:perf/core] perf/x86/intel: Disallow flags for most Core2/ Atom/Nehalem/Westmere events tip-bot for Andi Kleen
2014-09-25 9:25 ` [PATCH 1/3] perf, x86: Add INTEL_FLAGS_UEVENT_CONSTRAINT Peter Zijlstra
2014-11-16 12:34 ` tip-bot for Andi Kleen [this message]
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