From: tip-bot for Konrad Rzeszutek Wilk <tipbot@zytor.com>
To: linux-tip-commits@vger.kernel.org
Cc: linux-kernel@vger.kernel.org, hpa@zytor.com, mingo@kernel.org,
konrad.wilk@oracle.com, tglx@linutronix.de, hpa@linux.intel.com
Subject: [tip:x86/urgent] x86, doc: Fix incorrect comment about 64-bit code segment descriptors
Date: Mon, 25 Feb 2013 14:15:18 -0800 [thread overview]
Message-ID: <tip-1256276c98dbcfb009ac8e0687df9a1e291fd149@git.kernel.org> (raw)
In-Reply-To: <1361825650-14031-4-git-send-email-konrad.wilk@oracle.com>
Commit-ID: 1256276c98dbcfb009ac8e0687df9a1e291fd149
Gitweb: http://git.kernel.org/tip/1256276c98dbcfb009ac8e0687df9a1e291fd149
Author: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
AuthorDate: Mon, 25 Feb 2013 15:54:10 -0500
Committer: H. Peter Anvin <hpa@linux.intel.com>
CommitDate: Mon, 25 Feb 2013 13:42:37 -0800
x86, doc: Fix incorrect comment about 64-bit code segment descriptors
The AMD64 Architecture Programmer's Manual Volume 2, on page
89 mentions: "If the processor is running in 64-bit mode (L=1),
the only valid setting of the D bit is 0." This matches
with what the code does.
Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Link: http://lkml.kernel.org/r/1361825650-14031-4-git-send-email-konrad.wilk@oracle.com
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
---
arch/x86/kernel/head_64.S | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/x86/kernel/head_64.S b/arch/x86/kernel/head_64.S
index 980053c..37f5304 100644
--- a/arch/x86/kernel/head_64.S
+++ b/arch/x86/kernel/head_64.S
@@ -49,7 +49,7 @@ L3_START_KERNEL = pud_index(__START_KERNEL_map)
startup_64:
/*
- * At this point the CPU runs in 64bit mode CS.L = 1 CS.D = 1,
+ * At this point the CPU runs in 64bit mode CS.L = 1 CS.D = 0,
* and someone has loaded an identity mapped page table
* for us. These identity mapped page tables map all of the
* kernel pages and possibly all of memory.
@@ -146,7 +146,7 @@ ident_complete:
jmp secondary_startup_64
ENTRY(secondary_startup_64)
/*
- * At this point the CPU runs in 64bit mode CS.L = 1 CS.D = 1,
+ * At this point the CPU runs in 64bit mode CS.L = 1 CS.D = 0,
* and someone has loaded a mapped page table.
*
* %esi holds a physical pointer to real_mode_data.
next prev parent reply other threads:[~2013-02-25 22:16 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-02-25 20:54 [PATCH] Documentation and source code comments updates (v1) Konrad Rzeszutek Wilk
2013-02-25 20:54 ` [PATCH 1/3] xen/documentation: Mention 'earlyprintk=xen' in the documentation Konrad Rzeszutek Wilk
2013-02-25 22:13 ` [tip:x86/urgent] doc, xen: " tip-bot for Konrad Rzeszutek Wilk
2013-02-25 20:54 ` [PATCH 2/3] kernel-parameters: Document 'console=hvc<n>' Konrad Rzeszutek Wilk
2013-02-25 22:14 ` [tip:x86/urgent] doc, kernel-parameters: Document 'console=hvc<n> ' tip-bot for Konrad Rzeszutek Wilk
2013-02-25 20:54 ` [PATCH 3/3] docs: Fix incorrect comment about 64-bit code segment descriptors Konrad Rzeszutek Wilk
2013-02-25 22:15 ` tip-bot for Konrad Rzeszutek Wilk [this message]
2013-02-26 5:08 ` [PATCH] Documentation and source code comments updates (v1) Rob Landley
2013-02-26 16:40 ` Konrad Rzeszutek Wilk
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