From: tip-bot for Robert Richter <robert.richter@amd.com>
To: linux-tip-commits@vger.kernel.org
Cc: linux-kernel@vger.kernel.org, hpa@zytor.com, mingo@redhat.com,
robert.richter@amd.com, a.p.zijlstra@chello.nl,
tglx@linutronix.de, mingo@elte.hu
Subject: [tip:perf/core] perf, x86: Pass enable bit mask to __x86_pmu_enable_event()
Date: Fri, 7 May 2010 18:43:03 GMT [thread overview]
Message-ID: <tip-31fa58af57c41d2912debf62d47d5811062411f1@git.kernel.org> (raw)
In-Reply-To: <1271190201-25705-6-git-send-email-robert.richter@amd.com>
Commit-ID: 31fa58af57c41d2912debf62d47d5811062411f1
Gitweb: http://git.kernel.org/tip/31fa58af57c41d2912debf62d47d5811062411f1
Author: Robert Richter <robert.richter@amd.com>
AuthorDate: Tue, 13 Apr 2010 22:23:14 +0200
Committer: Ingo Molnar <mingo@elte.hu>
CommitDate: Fri, 7 May 2010 11:31:00 +0200
perf, x86: Pass enable bit mask to __x86_pmu_enable_event()
To reuse this function for events with different enable bit masks,
this mask is part of the function's argument list now.
The function will be used later to control ibs events too.
Signed-off-by: Robert Richter <robert.richter@amd.com>
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
LKML-Reference: <1271190201-25705-6-git-send-email-robert.richter@amd.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
---
arch/x86/kernel/cpu/perf_event.c | 9 +++++----
arch/x86/kernel/cpu/perf_event_intel.c | 5 +++--
2 files changed, 8 insertions(+), 6 deletions(-)
diff --git a/arch/x86/kernel/cpu/perf_event.c b/arch/x86/kernel/cpu/perf_event.c
index c2c1e10..4e218d7 100644
--- a/arch/x86/kernel/cpu/perf_event.c
+++ b/arch/x86/kernel/cpu/perf_event.c
@@ -844,10 +844,10 @@ void hw_perf_enable(void)
x86_pmu.enable_all(added);
}
-static inline void __x86_pmu_enable_event(struct hw_perf_event *hwc)
+static inline void __x86_pmu_enable_event(struct hw_perf_event *hwc,
+ u64 enable_mask)
{
- wrmsrl(hwc->config_base + hwc->idx,
- hwc->config | ARCH_PERFMON_EVENTSEL_ENABLE);
+ wrmsrl(hwc->config_base + hwc->idx, hwc->config | enable_mask);
}
static inline void x86_pmu_disable_event(struct perf_event *event)
@@ -919,7 +919,8 @@ static void x86_pmu_enable_event(struct perf_event *event)
{
struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
if (cpuc->enabled)
- __x86_pmu_enable_event(&event->hw);
+ __x86_pmu_enable_event(&event->hw,
+ ARCH_PERFMON_EVENTSEL_ENABLE);
}
/*
diff --git a/arch/x86/kernel/cpu/perf_event_intel.c b/arch/x86/kernel/cpu/perf_event_intel.c
index a099df9..a4b56ac 100644
--- a/arch/x86/kernel/cpu/perf_event_intel.c
+++ b/arch/x86/kernel/cpu/perf_event_intel.c
@@ -513,7 +513,8 @@ static void intel_pmu_nhm_enable_all(int added)
if (!event)
continue;
- __x86_pmu_enable_event(&event->hw);
+ __x86_pmu_enable_event(&event->hw,
+ ARCH_PERFMON_EVENTSEL_ENABLE);
}
}
intel_pmu_enable_all(added);
@@ -617,7 +618,7 @@ static void intel_pmu_enable_event(struct perf_event *event)
if (unlikely(event->attr.precise))
intel_pmu_pebs_enable(event);
- __x86_pmu_enable_event(hwc);
+ __x86_pmu_enable_event(hwc, ARCH_PERFMON_EVENTSEL_ENABLE);
}
/*
next prev parent reply other threads:[~2010-05-07 18:43 UTC|newest]
Thread overview: 55+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-04-13 20:23 [PATCH 00/12] perf: introduce model specific events and AMD IBS Robert Richter
2010-04-13 20:23 ` [PATCH 01/12] perf, x86: move perfctr init code to x86_setup_perfctr() Robert Richter
2010-05-07 18:42 ` [tip:perf/core] perf, x86: Move " tip-bot for Robert Richter
2010-04-13 20:23 ` [PATCH 02/12] perf, x86: moving x86_setup_perfctr() Robert Richter
2010-05-07 18:42 ` [tip:perf/core] perf, x86: Move x86_setup_perfctr() tip-bot for Robert Richter
2010-04-13 20:23 ` [PATCH 03/12] perf, x86: call x86_setup_perfctr() from .hw_config() Robert Richter
2010-05-07 18:42 ` [tip:perf/core] perf, x86: Call " tip-bot for Robert Richter
2010-04-13 20:23 ` [PATCH 04/12] perf: introduce flag for model specific events Robert Richter
2010-04-13 20:23 ` [PATCH 05/12] perf, x86: pass enable bit mask to __x86_pmu_enable_event() Robert Richter
2010-05-07 18:43 ` tip-bot for Robert Richter [this message]
2010-04-13 20:23 ` [PATCH 06/12] perf, x86: use weight instead of cmask in for_each_event_constraint() Robert Richter
2010-05-07 18:43 ` [tip:perf/core] perf, x86: Use " tip-bot for Robert Richter
2010-04-13 20:23 ` [PATCH 07/12] perf, x86: introduce bit range for special pmu events Robert Richter
2010-04-13 20:23 ` [PATCH 08/12] perf, x86: modify some code to allow the introduction of ibs events Robert Richter
2010-04-13 20:23 ` [PATCH 09/12] perf, x86: implement IBS feature detection Robert Richter
2010-04-13 20:23 ` [PATCH 10/12] perf, x86: setup NMI handler for IBS Robert Richter
2010-04-15 12:57 ` Peter Zijlstra
2010-04-15 13:11 ` Robert Richter
2010-04-19 16:04 ` Robert Richter
2010-04-13 20:23 ` [PATCH 11/12] perf, x86: implement AMD IBS event configuration Robert Richter
2010-04-19 13:46 ` Stephane Eranian
2010-04-20 10:31 ` Robert Richter
2010-04-20 16:05 ` Robert Richter
2010-04-21 8:47 ` Robert Richter
2010-04-21 9:02 ` Stephane Eranian
2010-04-21 9:21 ` Robert Richter
2010-04-21 10:54 ` Robert Richter
2010-04-21 11:37 ` Stephane Eranian
2010-04-21 16:58 ` Robert Richter
2010-04-22 17:32 ` Stephane Eranian
2010-05-11 13:57 ` Robert Richter
2010-04-13 20:23 ` [PATCH 12/12] perf, x86: implement the ibs interrupt handler Robert Richter
2010-04-19 12:19 ` Stephane Eranian
2010-04-20 13:10 ` Robert Richter
2010-04-22 14:45 ` Robert Richter
2010-05-07 15:28 ` [PATCH] perf: fix raw sample size if no sampling data is attached Robert Richter
2010-05-07 15:41 ` Peter Zijlstra
2010-05-07 19:48 ` Robert Richter
2010-05-18 15:12 ` [RFC PATCH] perf: align raw sample data on 64-bit boundaries Robert Richter
2010-05-19 7:39 ` Frederic Weisbecker
2010-05-19 9:31 ` Robert Richter
2010-05-24 21:25 ` Frederic Weisbecker
2010-05-28 17:35 ` Robert Richter
2010-04-13 20:45 ` [osrc-patches] [PATCH 00/12] perf: introduce model specific events and AMD IBS Robert Richter
2010-04-14 12:31 ` Robert Richter
2010-04-15 7:41 ` Peter Zijlstra
2010-04-15 7:44 ` Peter Zijlstra
2010-04-15 15:16 ` Robert Richter
2010-04-21 12:11 ` Peter Zijlstra
2010-04-21 13:21 ` Stephane Eranian
2010-04-21 18:26 ` Robert Richter
2010-04-21 18:40 ` Stephane Eranian
2010-04-21 16:28 ` Robert Richter
2010-04-28 16:16 ` [osrc-patches] " Robert Richter
2010-05-04 14:18 ` Peter Zijlstra
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=tip-31fa58af57c41d2912debf62d47d5811062411f1@git.kernel.org \
--to=robert.richter@amd.com \
--cc=a.p.zijlstra@chello.nl \
--cc=hpa@zytor.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-tip-commits@vger.kernel.org \
--cc=mingo@elte.hu \
--cc=mingo@redhat.com \
--cc=tglx@linutronix.de \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
Powered by JetHome