* [PATCH v2 2/2] x86/mce: Report only DRAM ECC as memory errors on AMD systems
2017-12-07 20:39 [PATCH v2 1/2] x86/mce/AMD: Define function to get SMCA bank type Yazen Ghannam
@ 2017-12-07 20:39 ` Yazen Ghannam
2017-12-10 16:18 ` Borislav Petkov
2017-12-18 12:01 ` [tip:ras/core] x86/MCE: " tip-bot for Yazen Ghannam
2017-12-10 14:47 ` [PATCH v2 1/2] x86/mce/AMD: Define function to get SMCA bank type Borislav Petkov
2017-12-18 12:00 ` [tip:ras/core] x86/MCE/AMD: Define a " tip-bot for Yazen Ghannam
2 siblings, 2 replies; 6+ messages in thread
From: Yazen Ghannam @ 2017-12-07 20:39 UTC (permalink / raw)
To: linux-edac; +Cc: Yazen Ghannam, Borislav Petkov, Tony Luck, x86, linux-kernel
From: Yazen Ghannam <yazen.ghannam@amd.com>
The MCA_STATUS[ErrorCodeExt] field is very bank type specific. We currently
check if the ErrorCodeExt value is 0x0 or 0x8 in mce_is_memory_error(), but
we don't check the bank. This means that we could flag non-memory errors as
memory errors.
We know that we want to flag DRAM ECC errors as memory errors, so let's do
those cases first. We can add more cases later when needed.
Check that bank type is UMC and xec is 0 on SMCA systems.
Check that bank is 4 (Northbridge) and xec is 8 on legacy systems.
Define a wrapper function in mce_amd.c so we can use SMCA enums.
Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com>
---
Link:
https://lkml.kernel.org/r/20171201155034.39206-2-Yazen.Ghannam@amd.com
v1->v2:
* No changes.
arch/x86/include/asm/mce.h | 2 ++
arch/x86/kernel/cpu/mcheck/mce.c | 4 +---
arch/x86/kernel/cpu/mcheck/mce_amd.c | 11 +++++++++++
3 files changed, 14 insertions(+), 3 deletions(-)
diff --git a/arch/x86/include/asm/mce.h b/arch/x86/include/asm/mce.h
index b1e8d8db921f..96ea4b5ba658 100644
--- a/arch/x86/include/asm/mce.h
+++ b/arch/x86/include/asm/mce.h
@@ -376,6 +376,7 @@ struct smca_bank {
extern struct smca_bank smca_banks[MAX_NR_BANKS];
extern const char *smca_get_long_name(enum smca_bank_types t);
+extern bool amd_mce_is_memory_error(struct mce *m);
extern int mce_threshold_create_device(unsigned int cpu);
extern int mce_threshold_remove_device(unsigned int cpu);
@@ -384,6 +385,7 @@ extern int mce_threshold_remove_device(unsigned int cpu);
static inline int mce_threshold_create_device(unsigned int cpu) { return 0; };
static inline int mce_threshold_remove_device(unsigned int cpu) { return 0; };
+static inline bool amd_mce_is_memory_error(struct mce *m) { return false; };
#endif
diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c
index b1d616d08eee..321c7a80be66 100644
--- a/arch/x86/kernel/cpu/mcheck/mce.c
+++ b/arch/x86/kernel/cpu/mcheck/mce.c
@@ -503,10 +503,8 @@ static int mce_usable_address(struct mce *m)
bool mce_is_memory_error(struct mce *m)
{
if (m->cpuvendor == X86_VENDOR_AMD) {
- /* ErrCodeExt[20:16] */
- u8 xec = (m->status >> 16) & 0x1f;
+ return amd_mce_is_memory_error(m);
- return (xec == 0x0 || xec == 0x8);
} else if (m->cpuvendor == X86_VENDOR_INTEL) {
/*
* Intel SDM Volume 3B - 15.9.2 Compound Error Codes
diff --git a/arch/x86/kernel/cpu/mcheck/mce_amd.c b/arch/x86/kernel/cpu/mcheck/mce_amd.c
index 219d5115f4d4..2b7f7ce4bedf 100644
--- a/arch/x86/kernel/cpu/mcheck/mce_amd.c
+++ b/arch/x86/kernel/cpu/mcheck/mce_amd.c
@@ -750,6 +750,17 @@ int umc_normaddr_to_sysaddr(u64 norm_addr, u16 nid, u8 umc, u64 *sys_addr)
}
EXPORT_SYMBOL_GPL(umc_normaddr_to_sysaddr);
+bool amd_mce_is_memory_error(struct mce *m)
+{
+ /* ErrCodeExt[20:16] */
+ u8 xec = (m->status >> 16) & 0x1f;
+
+ if (mce_flags.smca)
+ return (smca_get_bank_type(m) == SMCA_UMC && xec == 0x0);
+
+ return (m->bank == 4 && xec == 0x8);
+}
+
static void __log_error(unsigned int bank, u64 status, u64 addr, u64 misc)
{
struct mce m;
--
2.14.1
^ permalink raw reply [flat|nested] 6+ messages in thread* Re: [PATCH v2 2/2] x86/mce: Report only DRAM ECC as memory errors on AMD systems
2017-12-07 20:39 ` [PATCH v2 2/2] x86/mce: Report only DRAM ECC as memory errors on AMD systems Yazen Ghannam
@ 2017-12-10 16:18 ` Borislav Petkov
2017-12-18 12:01 ` [tip:ras/core] x86/MCE: " tip-bot for Yazen Ghannam
1 sibling, 0 replies; 6+ messages in thread
From: Borislav Petkov @ 2017-12-10 16:18 UTC (permalink / raw)
To: Yazen Ghannam; +Cc: linux-edac, Tony Luck, x86, linux-kernel
On Thu, Dec 07, 2017 at 02:39:55PM -0600, Yazen Ghannam wrote:
> From: Yazen Ghannam <yazen.ghannam@amd.com>
>
> The MCA_STATUS[ErrorCodeExt] field is very bank type specific. We currently
> check if the ErrorCodeExt value is 0x0 or 0x8 in mce_is_memory_error(), but
> we don't check the bank. This means that we could flag non-memory errors as
> memory errors.
>
> We know that we want to flag DRAM ECC errors as memory errors, so let's do
> those cases first. We can add more cases later when needed.
>
> Check that bank type is UMC and xec is 0 on SMCA systems.
>
> Check that bank is 4 (Northbridge) and xec is 8 on legacy systems.
>
> Define a wrapper function in mce_amd.c so we can use SMCA enums.
>
> Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com>
> ---
> Link:
> https://lkml.kernel.org/r/20171201155034.39206-2-Yazen.Ghannam@amd.com
>
> v1->v2:
> * No changes.
>
> arch/x86/include/asm/mce.h | 2 ++
> arch/x86/kernel/cpu/mcheck/mce.c | 4 +---
> arch/x86/kernel/cpu/mcheck/mce_amd.c | 11 +++++++++++
> 3 files changed, 14 insertions(+), 3 deletions(-)
>
> diff --git a/arch/x86/include/asm/mce.h b/arch/x86/include/asm/mce.h
> index b1e8d8db921f..96ea4b5ba658 100644
> --- a/arch/x86/include/asm/mce.h
> +++ b/arch/x86/include/asm/mce.h
> @@ -376,6 +376,7 @@ struct smca_bank {
> extern struct smca_bank smca_banks[MAX_NR_BANKS];
>
> extern const char *smca_get_long_name(enum smca_bank_types t);
> +extern bool amd_mce_is_memory_error(struct mce *m);
>
> extern int mce_threshold_create_device(unsigned int cpu);
> extern int mce_threshold_remove_device(unsigned int cpu);
> @@ -384,6 +385,7 @@ extern int mce_threshold_remove_device(unsigned int cpu);
>
> static inline int mce_threshold_create_device(unsigned int cpu) { return 0; };
> static inline int mce_threshold_remove_device(unsigned int cpu) { return 0; };
> +static inline bool amd_mce_is_memory_error(struct mce *m) { return false; };
>
> #endif
>
> diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c
> index b1d616d08eee..321c7a80be66 100644
> --- a/arch/x86/kernel/cpu/mcheck/mce.c
> +++ b/arch/x86/kernel/cpu/mcheck/mce.c
> @@ -503,10 +503,8 @@ static int mce_usable_address(struct mce *m)
> bool mce_is_memory_error(struct mce *m)
> {
> if (m->cpuvendor == X86_VENDOR_AMD) {
> - /* ErrCodeExt[20:16] */
> - u8 xec = (m->status >> 16) & 0x1f;
> + return amd_mce_is_memory_error(m);
>
> - return (xec == 0x0 || xec == 0x8);
> } else if (m->cpuvendor == X86_VENDOR_INTEL) {
> /*
> * Intel SDM Volume 3B - 15.9.2 Compound Error Codes
> diff --git a/arch/x86/kernel/cpu/mcheck/mce_amd.c b/arch/x86/kernel/cpu/mcheck/mce_amd.c
> index 219d5115f4d4..2b7f7ce4bedf 100644
> --- a/arch/x86/kernel/cpu/mcheck/mce_amd.c
> +++ b/arch/x86/kernel/cpu/mcheck/mce_amd.c
> @@ -750,6 +750,17 @@ int umc_normaddr_to_sysaddr(u64 norm_addr, u16 nid, u8 umc, u64 *sys_addr)
> }
> EXPORT_SYMBOL_GPL(umc_normaddr_to_sysaddr);
>
> +bool amd_mce_is_memory_error(struct mce *m)
> +{
> + /* ErrCodeExt[20:16] */
> + u8 xec = (m->status >> 16) & 0x1f;
> +
> + if (mce_flags.smca)
> + return (smca_get_bank_type(m) == SMCA_UMC && xec == 0x0);
> +
> + return (m->bank == 4 && xec == 0x8);
You don't need brackets around the return statements.
Anyway, applied, thx.
--
Regards/Gruss,
Boris.
SUSE Linux GmbH, GF: Felix Imendörffer, Jane Smithard, Graham Norton, HRB 21284 (AG Nürnberg)
--
^ permalink raw reply [flat|nested] 6+ messages in thread* [tip:ras/core] x86/MCE: Report only DRAM ECC as memory errors on AMD systems
2017-12-07 20:39 ` [PATCH v2 2/2] x86/mce: Report only DRAM ECC as memory errors on AMD systems Yazen Ghannam
2017-12-10 16:18 ` Borislav Petkov
@ 2017-12-18 12:01 ` tip-bot for Yazen Ghannam
1 sibling, 0 replies; 6+ messages in thread
From: tip-bot for Yazen Ghannam @ 2017-12-18 12:01 UTC (permalink / raw)
To: linux-tip-commits; +Cc: mingo, yazen.ghannam, linux-kernel, bp, hpa, tglx
Commit-ID: c6708d50f166bea2d763c96485d31fdbc50204f1
Gitweb: https://git.kernel.org/tip/c6708d50f166bea2d763c96485d31fdbc50204f1
Author: Yazen Ghannam <yazen.ghannam@amd.com>
AuthorDate: Mon, 18 Dec 2017 12:37:13 +0100
Committer: Thomas Gleixner <tglx@linutronix.de>
CommitDate: Mon, 18 Dec 2017 12:58:29 +0100
x86/MCE: Report only DRAM ECC as memory errors on AMD systems
The MCA_STATUS[ErrorCodeExt] field is very bank type specific.
We currently check if the ErrorCodeExt value is 0x0 or 0x8 in
mce_is_memory_error(), but we don't check the bank number. This means
that we could flag non-memory errors as memory errors.
We know that we want to flag DRAM ECC errors as memory errors, so let's do
those cases first. We can add more cases later when needed.
Define a wrapper function in mce_amd.c so we can use SMCA enums.
[ bp: Remove brackets around return statements. ]
Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Link: http://lkml.kernel.org/r/20171207203955.118171-2-Yazen.Ghannam@amd.com
---
arch/x86/include/asm/mce.h | 2 ++
arch/x86/kernel/cpu/mcheck/mce.c | 4 +---
arch/x86/kernel/cpu/mcheck/mce_amd.c | 11 +++++++++++
3 files changed, 14 insertions(+), 3 deletions(-)
diff --git a/arch/x86/include/asm/mce.h b/arch/x86/include/asm/mce.h
index b1e8d8d..96ea4b5 100644
--- a/arch/x86/include/asm/mce.h
+++ b/arch/x86/include/asm/mce.h
@@ -376,6 +376,7 @@ struct smca_bank {
extern struct smca_bank smca_banks[MAX_NR_BANKS];
extern const char *smca_get_long_name(enum smca_bank_types t);
+extern bool amd_mce_is_memory_error(struct mce *m);
extern int mce_threshold_create_device(unsigned int cpu);
extern int mce_threshold_remove_device(unsigned int cpu);
@@ -384,6 +385,7 @@ extern int mce_threshold_remove_device(unsigned int cpu);
static inline int mce_threshold_create_device(unsigned int cpu) { return 0; };
static inline int mce_threshold_remove_device(unsigned int cpu) { return 0; };
+static inline bool amd_mce_is_memory_error(struct mce *m) { return false; };
#endif
diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c
index b1d616d..321c7a80 100644
--- a/arch/x86/kernel/cpu/mcheck/mce.c
+++ b/arch/x86/kernel/cpu/mcheck/mce.c
@@ -503,10 +503,8 @@ static int mce_usable_address(struct mce *m)
bool mce_is_memory_error(struct mce *m)
{
if (m->cpuvendor == X86_VENDOR_AMD) {
- /* ErrCodeExt[20:16] */
- u8 xec = (m->status >> 16) & 0x1f;
+ return amd_mce_is_memory_error(m);
- return (xec == 0x0 || xec == 0x8);
} else if (m->cpuvendor == X86_VENDOR_INTEL) {
/*
* Intel SDM Volume 3B - 15.9.2 Compound Error Codes
diff --git a/arch/x86/kernel/cpu/mcheck/mce_amd.c b/arch/x86/kernel/cpu/mcheck/mce_amd.c
index 661c473..0f32ad2 100644
--- a/arch/x86/kernel/cpu/mcheck/mce_amd.c
+++ b/arch/x86/kernel/cpu/mcheck/mce_amd.c
@@ -754,6 +754,17 @@ out_err:
}
EXPORT_SYMBOL_GPL(umc_normaddr_to_sysaddr);
+bool amd_mce_is_memory_error(struct mce *m)
+{
+ /* ErrCodeExt[20:16] */
+ u8 xec = (m->status >> 16) & 0x1f;
+
+ if (mce_flags.smca)
+ return smca_get_bank_type(m) == SMCA_UMC && xec == 0x0;
+
+ return m->bank == 4 && xec == 0x8;
+}
+
static void __log_error(unsigned int bank, u64 status, u64 addr, u64 misc)
{
struct mce m;
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v2 1/2] x86/mce/AMD: Define function to get SMCA bank type
2017-12-07 20:39 [PATCH v2 1/2] x86/mce/AMD: Define function to get SMCA bank type Yazen Ghannam
2017-12-07 20:39 ` [PATCH v2 2/2] x86/mce: Report only DRAM ECC as memory errors on AMD systems Yazen Ghannam
@ 2017-12-10 14:47 ` Borislav Petkov
2017-12-18 12:00 ` [tip:ras/core] x86/MCE/AMD: Define a " tip-bot for Yazen Ghannam
2 siblings, 0 replies; 6+ messages in thread
From: Borislav Petkov @ 2017-12-10 14:47 UTC (permalink / raw)
To: Yazen Ghannam; +Cc: linux-edac, Tony Luck, x86, linux-kernel
On Thu, Dec 07, 2017 at 02:39:54PM -0600, Yazen Ghannam wrote:
> diff --git a/arch/x86/kernel/cpu/mcheck/mce_amd.c b/arch/x86/kernel/cpu/mcheck/mce_amd.c
> index a38ab1fa53a2..219d5115f4d4 100644
> --- a/arch/x86/kernel/cpu/mcheck/mce_amd.c
> +++ b/arch/x86/kernel/cpu/mcheck/mce_amd.c
> @@ -110,6 +110,16 @@ const char *smca_get_long_name(enum smca_bank_types t)
> }
> EXPORT_SYMBOL_GPL(smca_get_long_name);
>
> +static enum smca_bank_types smca_get_bank_type(struct mce *m)
> +{
> + struct smca_bank bank = smca_banks[m->bank];
^^^^^^^^
That's a NULL ptr deref waiting to happen.
Also, struct smca_bank bank should be a pointer.
I ended up committing this:
---
From: Yazen Ghannam <yazen.ghannam@amd.com>
Date: Thu, 7 Dec 2017 14:39:54 -0600
Subject: [PATCH] x86/MCE/AMD: Define a function to get SMCA bank type
Scalable MCA systems have various types of banks. The bank's type
can determine how we handle errors from it. For example, if a bank
represents a UMC (Unified Memory Controller) then we will need to
convert its address from a normalized address to a system physical
address before handling the error.
Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com>
Cc: Tony Luck <tony.luck@intel.com>
Cc: linux-edac <linux-edac@vger.kernel.org>
Cc: x86-ml <x86@kernel.org>
Link: http://lkml.kernel.org/r/20171207203955.118171-1-Yazen.Ghannam@amd.com
[ Verify m->bank is within range and use bank pointer. ]
Signed-off-by:
---
arch/x86/kernel/cpu/mcheck/mce_amd.c | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/arch/x86/kernel/cpu/mcheck/mce_amd.c b/arch/x86/kernel/cpu/mcheck/mce_amd.c
index a38ab1fa53a2..661c4738be27 100644
--- a/arch/x86/kernel/cpu/mcheck/mce_amd.c
+++ b/arch/x86/kernel/cpu/mcheck/mce_amd.c
@@ -110,6 +110,20 @@ const char *smca_get_long_name(enum smca_bank_types t)
}
EXPORT_SYMBOL_GPL(smca_get_long_name);
+static enum smca_bank_types smca_get_bank_type(struct mce *m)
+{
+ struct smca_bank *b;
+
+ if (m->bank >= N_SMCA_BANK_TYPES)
+ return N_SMCA_BANK_TYPES;
+
+ b = &smca_banks[m->bank];
+ if (!b->hwid)
+ return N_SMCA_BANK_TYPES;
+
+ return b->hwid->bank_type;
+}
+
static struct smca_hwid smca_hwid_mcatypes[] = {
/* { bank_type, hwid_mcatype, xec_bitmap } */
--
2.13.0
SUSE Linux GmbH, GF: Felix Imendörffer, Jane Smithard, Graham Norton, HRB 21284 (AG Nürnberg)
--
^ permalink raw reply [flat|nested] 6+ messages in thread* [tip:ras/core] x86/MCE/AMD: Define a function to get SMCA bank type
2017-12-07 20:39 [PATCH v2 1/2] x86/mce/AMD: Define function to get SMCA bank type Yazen Ghannam
2017-12-07 20:39 ` [PATCH v2 2/2] x86/mce: Report only DRAM ECC as memory errors on AMD systems Yazen Ghannam
2017-12-10 14:47 ` [PATCH v2 1/2] x86/mce/AMD: Define function to get SMCA bank type Borislav Petkov
@ 2017-12-18 12:00 ` tip-bot for Yazen Ghannam
2 siblings, 0 replies; 6+ messages in thread
From: tip-bot for Yazen Ghannam @ 2017-12-18 12:00 UTC (permalink / raw)
To: linux-tip-commits; +Cc: bp, tglx, linux-kernel, yazen.ghannam, mingo, hpa
Commit-ID: 11cf887728a3d1de77cc12ce247b64ef32608891
Gitweb: https://git.kernel.org/tip/11cf887728a3d1de77cc12ce247b64ef32608891
Author: Yazen Ghannam <yazen.ghannam@amd.com>
AuthorDate: Mon, 18 Dec 2017 12:37:12 +0100
Committer: Thomas Gleixner <tglx@linutronix.de>
CommitDate: Mon, 18 Dec 2017 12:58:28 +0100
x86/MCE/AMD: Define a function to get SMCA bank type
Scalable MCA systems have various types of banks. The bank's type
can determine how we handle errors from it. For example, if a bank
represents a UMC (Unified Memory Controller) then we will need to
convert its address from a normalized address to a system physical
address before handling the error.
[ bp: Verify m->bank is within range and use bank pointer. ]
Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Link: http://lkml.kernel.org/r/20171207203955.118171-1-Yazen.Ghannam@amd.com
---
arch/x86/kernel/cpu/mcheck/mce_amd.c | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/arch/x86/kernel/cpu/mcheck/mce_amd.c b/arch/x86/kernel/cpu/mcheck/mce_amd.c
index a38ab1f..661c473 100644
--- a/arch/x86/kernel/cpu/mcheck/mce_amd.c
+++ b/arch/x86/kernel/cpu/mcheck/mce_amd.c
@@ -110,6 +110,20 @@ const char *smca_get_long_name(enum smca_bank_types t)
}
EXPORT_SYMBOL_GPL(smca_get_long_name);
+static enum smca_bank_types smca_get_bank_type(struct mce *m)
+{
+ struct smca_bank *b;
+
+ if (m->bank >= N_SMCA_BANK_TYPES)
+ return N_SMCA_BANK_TYPES;
+
+ b = &smca_banks[m->bank];
+ if (!b->hwid)
+ return N_SMCA_BANK_TYPES;
+
+ return b->hwid->bank_type;
+}
+
static struct smca_hwid smca_hwid_mcatypes[] = {
/* { bank_type, hwid_mcatype, xec_bitmap } */
^ permalink raw reply [flat|nested] 6+ messages in thread