[PATCH] perf/x86/uncore: Add missing filter constraint for SKX CHA event

[PATCH] perf/x86/uncore: Add missing filter constraint for SKX CHA event

[Kan Liang]

From: Stephane Eranian <eranian@google.com>

Adding a filter constraint for Intel Skylake CHA event
UNC_CHA_UPI_CREDITS_ACQUIRED (0x38).
The event supports core-id/thread-id and link filtering.

Signed-off-by: Stephane Eranian <eranian@google.com>
Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
---
 arch/x86/events/intel/uncore_snbep.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/x86/events/intel/uncore_snbep.c b/arch/x86/events/intel/uncore_snbep.c
index 8ff1aac..d4672ed 100644
--- a/arch/x86/events/intel/uncore_snbep.c
+++ b/arch/x86/events/intel/uncore_snbep.c
@@ -3355,6 +3355,7 @@ static struct extra_reg skx_uncore_cha_extra_regs[] = {
 	SNBEP_CBO_EVENT_EXTRA_REG(0x9134, 0xffff, 0x4),
 	SNBEP_CBO_EVENT_EXTRA_REG(0x35, 0xff, 0x8),
 	SNBEP_CBO_EVENT_EXTRA_REG(0x36, 0xff, 0x8),
+	SNBEP_CBO_EVENT_EXTRA_REG(0x38, 0xff, 0x3),
 	EVENT_EXTRA_END
 };
 
-- 
2.7.4

Re: [PATCH] perf/x86/uncore: Add missing filter constraint for SKX CHA event

[Peter Zijlstra]

On Mon, Mar 12, 2018 at 08:41:34AM -0700, Kan Liang wrote:
> From: Stephane Eranian <eranian@google.com>
> 
> Adding a filter constraint for Intel Skylake CHA event
> UNC_CHA_UPI_CREDITS_ACQUIRED (0x38).
> The event supports core-id/thread-id and link filtering.

Could you also comment on the other CHA patch?

 https://lkml.kernel.org/r/CS1PR84MB01182561B15688095C4DBF30F6D80@CS1PR84MB0118.NAMPRD84.PROD.OUTLOOK.COM

Re: [PATCH] perf/x86/uncore: Add missing filter constraint for SKX CHA event

[Liang, Kan]

On 3/12/2018 12:39 PM, Peter Zijlstra wrote:
> On Mon, Mar 12, 2018 at 08:41:34AM -0700, Kan Liang wrote:
>> From: Stephane Eranian <eranian@google.com>
>>
>> Adding a filter constraint for Intel Skylake CHA event
>> UNC_CHA_UPI_CREDITS_ACQUIRED (0x38).
>> The event supports core-id/thread-id and link filtering.
> 
> Could you also comment on the other CHA patch?
> 
>   https://lkml.kernel.org/r/CS1PR84MB01182561B15688095C4DBF30F6D80@CS1PR84MB0118.NAMPRD84.PROD.OUTLOOK.COM
>


Now, there is a recommended way in uncore document to query the number 
of CHAs by reading bits 27:0 in the CAPID6 register located at Device 
30, Function 3, Offset 0x9C.
I have implemented a patch and sent it to Gary. It should fix his issue.

Thanks,
Kan

[tip:perf/urgent] perf/x86/intel/uncore: Add missing filter constraint for SKX CHA event

[tip-bot for Stephane Eranian]

Commit-ID:  e340895c9ed0b44548f08bbaaee4afc7bfacd354
Gitweb:     https://git.kernel.org/tip/e340895c9ed0b44548f08bbaaee4afc7bfacd354
Author:     Stephane Eranian <eranian@google.com>
AuthorDate: Mon, 12 Mar 2018 08:41:34 -0700
Committer:  Ingo Molnar <mingo@kernel.org>
CommitDate: Tue, 20 Mar 2018 08:53:32 +0100

perf/x86/intel/uncore: Add missing filter constraint for SKX CHA event

Adding a filter constraint for Intel Skylake CHA event
UNC_CHA_UPI_CREDITS_ACQUIRED (0x38).

The event supports core-id/thread-id and link filtering.

Signed-off-by: Stephane Eranian <eranian@google.com>
Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Vince Weaver <vincent.weaver@maine.edu>
Link: http://lkml.kernel.org/r/1520869294-14176-1-git-send-email-kan.liang@linux.intel.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
---
 arch/x86/events/intel/uncore_snbep.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/x86/events/intel/uncore_snbep.c b/arch/x86/events/intel/uncore_snbep.c
index 22ec65bc033a..0876798f2ac9 100644
--- a/arch/x86/events/intel/uncore_snbep.c
+++ b/arch/x86/events/intel/uncore_snbep.c
@@ -3343,6 +3343,7 @@ static struct extra_reg skx_uncore_cha_extra_regs[] = {
 	SNBEP_CBO_EVENT_EXTRA_REG(0x9134, 0xffff, 0x4),
 	SNBEP_CBO_EVENT_EXTRA_REG(0x35, 0xff, 0x8),
 	SNBEP_CBO_EVENT_EXTRA_REG(0x36, 0xff, 0x8),
+	SNBEP_CBO_EVENT_EXTRA_REG(0x38, 0xff, 0x3),
 	EVENT_EXTRA_END
 };