From: tip-bot for Suresh Siddha <suresh.b.siddha@intel.com>
To: linux-tip-commits@vger.kernel.org
Cc: linux-kernel@vger.kernel.org, hpa@zytor.com, mingo@redhat.com,
suresh.b.siddha@intel.com, tglx@linutronix.de,
hpa@linux.intel.com
Subject: [tip:x86/cpu] x86, cpu: Make init_scattered_cpuid_features() consider cpuid subleaves
Date: Tue, 20 Jul 2010 00:51:46 GMT [thread overview]
Message-ID: <tip-edb18f8ab02843453306601c4aa697f9691129cd@git.kernel.org> (raw)
In-Reply-To: <20100719230205.439900717@sbs-t61.sc.intel.com>
Commit-ID: edb18f8ab02843453306601c4aa697f9691129cd
Gitweb: http://git.kernel.org/tip/edb18f8ab02843453306601c4aa697f9691129cd
Author: Suresh Siddha <suresh.b.siddha@intel.com>
AuthorDate: Mon, 19 Jul 2010 16:05:50 -0700
Committer: H. Peter Anvin <hpa@linux.intel.com>
CommitDate: Mon, 19 Jul 2010 16:47:59 -0700
x86, cpu: Make init_scattered_cpuid_features() consider cpuid subleaves
Some cpuid features (like xsaveopt) are enumerated using cpuid
subleaves.
Extend init_scattered_cpuid_features() to take subleaf into account.
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
LKML-Reference: <20100719230205.439900717@sbs-t61.sc.intel.com>
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
---
arch/x86/kernel/cpu/addon_cpuid_features.c | 25 +++++++++++++------------
1 files changed, 13 insertions(+), 12 deletions(-)
diff --git a/arch/x86/kernel/cpu/addon_cpuid_features.c b/arch/x86/kernel/cpu/addon_cpuid_features.c
index 7369b4c..03cf24a 100644
--- a/arch/x86/kernel/cpu/addon_cpuid_features.c
+++ b/arch/x86/kernel/cpu/addon_cpuid_features.c
@@ -14,6 +14,7 @@ struct cpuid_bit {
u8 reg;
u8 bit;
u32 level;
+ u32 sub_leaf;
};
enum cpuid_regs {
@@ -30,16 +31,16 @@ void __cpuinit init_scattered_cpuid_features(struct cpuinfo_x86 *c)
const struct cpuid_bit *cb;
static const struct cpuid_bit __cpuinitconst cpuid_bits[] = {
- { X86_FEATURE_IDA, CR_EAX, 1, 0x00000006 },
- { X86_FEATURE_ARAT, CR_EAX, 2, 0x00000006 },
- { X86_FEATURE_APERFMPERF, CR_ECX, 0, 0x00000006 },
- { X86_FEATURE_EPB, CR_ECX, 3, 0x00000006 },
- { X86_FEATURE_CPB, CR_EDX, 9, 0x80000007 },
- { X86_FEATURE_NPT, CR_EDX, 0, 0x8000000a },
- { X86_FEATURE_LBRV, CR_EDX, 1, 0x8000000a },
- { X86_FEATURE_SVML, CR_EDX, 2, 0x8000000a },
- { X86_FEATURE_NRIPS, CR_EDX, 3, 0x8000000a },
- { 0, 0, 0, 0 }
+ { X86_FEATURE_IDA, CR_EAX, 1, 0x00000006, 0 },
+ { X86_FEATURE_ARAT, CR_EAX, 2, 0x00000006, 0 },
+ { X86_FEATURE_APERFMPERF, CR_ECX, 0, 0x00000006, 0 },
+ { X86_FEATURE_EPB, CR_ECX, 3, 0x00000006, 0 },
+ { X86_FEATURE_CPB, CR_EDX, 9, 0x80000007, 0 },
+ { X86_FEATURE_NPT, CR_EDX, 0, 0x8000000a, 0 },
+ { X86_FEATURE_LBRV, CR_EDX, 1, 0x8000000a, 0 },
+ { X86_FEATURE_SVML, CR_EDX, 2, 0x8000000a, 0 },
+ { X86_FEATURE_NRIPS, CR_EDX, 3, 0x8000000a, 0 },
+ { 0, 0, 0, 0, 0 }
};
for (cb = cpuid_bits; cb->feature; cb++) {
@@ -50,8 +51,8 @@ void __cpuinit init_scattered_cpuid_features(struct cpuinfo_x86 *c)
max_level > (cb->level | 0xffff))
continue;
- cpuid(cb->level, ®s[CR_EAX], ®s[CR_EBX],
- ®s[CR_ECX], ®s[CR_EDX]);
+ cpuid_count(cb->level, cb->sub_leaf, ®s[CR_EAX],
+ ®s[CR_EBX], ®s[CR_ECX], ®s[CR_EDX]);
if (regs[cb->reg] & (1 << cb->bit))
set_cpu_cap(c, cb->feature);
next prev parent reply other threads:[~2010-07-20 0:52 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-07-19 23:05 [patch 0/5] x86: xsaveopt kernel enabling patches - v2 Suresh Siddha
2010-07-19 23:05 ` [patch 1/5] x86: track the offset, size of features state in the xsave layout Suresh Siddha
2010-07-20 1:51 ` [tip:x86/xsave] x86, xsave: Track the offset, size of " tip-bot for Suresh Siddha
2010-07-19 23:05 ` [patch 2/5] x86: sync xsave memory layout with its header for user handling Suresh Siddha
2010-07-20 1:52 ` [tip:x86/xsave] x86, xsave: Sync " tip-bot for Suresh Siddha
2010-07-19 23:05 ` [patch 3/5] x86: extend init_scattered_cpuid_features() to consider cpuid subleaves Suresh Siddha
2010-07-20 0:51 ` tip-bot for Suresh Siddha [this message]
2010-07-19 23:05 ` [patch 4/5] x86: Add xsaveopt cpufeature Suresh Siddha
2010-07-20 0:52 ` [tip:x86/cpu] x86, cpu: " tip-bot for Suresh Siddha
2010-07-19 23:05 ` [patch 5/5] x86: use xsaveopt in context-switch path when supported Suresh Siddha
2010-07-20 0:52 ` [tip:x86/cpu] x86, cpu: Enumerate xsaveopt tip-bot for Suresh Siddha
2010-07-20 1:52 ` [tip:x86/xsave] x86, xsave: Use xsaveopt in context-switch path when supported tip-bot for Suresh Siddha
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=tip-edb18f8ab02843453306601c4aa697f9691129cd@git.kernel.org \
--to=suresh.b.siddha@intel.com \
--cc=hpa@linux.intel.com \
--cc=hpa@zytor.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-tip-commits@vger.kernel.org \
--cc=mingo@redhat.com \
--cc=tglx@linutronix.de \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
Powered by JetHome