[PATCH] reset: meson: enable level reset support on Meson8b

[PATCH] reset: meson: enable level reset support on Meson8b

[Martin Blumenstingl]

Commit a5a10afe04ef ("reset: meson: add level reset support for GX SoC
family") only enabled the level resets for the newer GX SoC family.
However, the older 32-Meson SoCs (Meson8, Meson8b and Meson8m2) also
support level resets using the same offset as the newer GX SoCs.

This removes the separation between Meson8b and the GX SoCs from the
reset-meson driver to enable the level resets also on Meson8b.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
---
 drivers/reset/reset-meson.c | 22 +++++-----------------
 1 file changed, 5 insertions(+), 17 deletions(-)

diff --git a/drivers/reset/reset-meson.c b/drivers/reset/reset-meson.c
index 93cbee1ae8ef..5242e0679df7 100644
--- a/drivers/reset/reset-meson.c
+++ b/drivers/reset/reset-meson.c
@@ -124,29 +124,21 @@ static int meson_reset_deassert(struct reset_controller_dev *rcdev,
 	return meson_reset_level(rcdev, id, false);
 }
 
-static const struct reset_control_ops meson_reset_meson8_ops = {
-	.reset		= meson_reset_reset,
-};
-
-static const struct reset_control_ops meson_reset_gx_ops = {
+static const struct reset_control_ops meson_reset_ops = {
 	.reset		= meson_reset_reset,
 	.assert		= meson_reset_assert,
 	.deassert	= meson_reset_deassert,
 };
 
 static const struct of_device_id meson_reset_dt_ids[] = {
-	 { .compatible = "amlogic,meson8b-reset",
-	   .data = &meson_reset_meson8_ops, },
-	 { .compatible = "amlogic,meson-gxbb-reset",
-	   .data = &meson_reset_gx_ops, },
-	 { .compatible = "amlogic,meson-axg-reset",
-	   .data = &meson_reset_gx_ops, },
+	 { .compatible = "amlogic,meson8b-reset" },
+	 { .compatible = "amlogic,meson-gxbb-reset" },
+	 { .compatible = "amlogic,meson-axg-reset" },
 	 { /* sentinel */ },
 };
 
 static int meson_reset_probe(struct platform_device *pdev)
 {
-	const struct reset_control_ops *ops;
 	struct meson_reset *data;
 	struct resource *res;
 
@@ -154,10 +146,6 @@ static int meson_reset_probe(struct platform_device *pdev)
 	if (!data)
 		return -ENOMEM;
 
-	ops = of_device_get_match_data(&pdev->dev);
-	if (!ops)
-		return -EINVAL;
-
 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 	data->reg_base = devm_ioremap_resource(&pdev->dev, res);
 	if (IS_ERR(data->reg_base))
@@ -169,7 +157,7 @@ static int meson_reset_probe(struct platform_device *pdev)
 
 	data->rcdev.owner = THIS_MODULE;
 	data->rcdev.nr_resets = REG_COUNT * BITS_PER_REG;
-	data->rcdev.ops = ops;
+	data->rcdev.ops = &meson_reset_ops;
 	data->rcdev.of_node = pdev->dev.of_node;
 
 	return devm_reset_controller_register(&pdev->dev, &data->rcdev);
-- 
2.15.1

[PATCH] reset: meson: enable level reset support on Meson8b

[Philipp Zabel]

Hi Martin,

On Tue, 2017-12-26 at 12:50 +0100, Martin Blumenstingl wrote:
> Commit a5a10afe04ef ("reset: meson: add level reset support for GX SoC
> family") only enabled the level resets for the newer GX SoC family.
> However, the older 32-Meson SoCs (Meson8, Meson8b and Meson8m2) also
> support level resets using the same offset as the newer GX SoCs.
> 
> This removes the separation between Meson8b and the GX SoCs from the
> reset-meson driver to enable the level resets also on Meson8b.
> 
> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>

Thank you for the patch.?It looks fine to me, not knowing the hardware
details.
The referenced commit made it sound like reset level handling on Meson8
is different from GX, though. Could somebody clarify?

regards
Philipp

[PATCH] reset: meson: enable level reset support on Meson8b

[Neil Armstrong]

On 02/01/2018 12:35, Philipp Zabel wrote:
> Hi Martin,
> 
> On Tue, 2017-12-26 at 12:50 +0100, Martin Blumenstingl wrote:
>> Commit a5a10afe04ef ("reset: meson: add level reset support for GX SoC
>> family") only enabled the level resets for the newer GX SoC family.
>> However, the older 32-Meson SoCs (Meson8, Meson8b and Meson8m2) also
>> support level resets using the same offset as the newer GX SoCs.
>>
>> This removes the separation between Meson8b and the GX SoCs from the
>> reset-meson driver to enable the level resets also on Meson8b.
>>
>> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
> 
> Thank you for the patch.?It looks fine to me, not knowing the hardware
> details.
> The referenced commit made it sound like reset level handling on Meson8
> is different from GX, though. Could somebody clarify?
> 
> regards
> Philipp
> 

Hi Philipp,

This is highly undocumented and needs reading the vendor source code and experimenting,
this patch is ok for me. Seems the register mapping did not change for a long time since
it's still the same on the latest AXG family.

Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>

Neil

[PATCH] reset: meson: enable level reset support on Meson8b

[Philipp Zabel]

On Tue, 2018-01-02 at 13:49 +0100, Neil Armstrong wrote:
> On 02/01/2018 12:35, Philipp Zabel wrote:
> > Hi Martin,
> > 
> > On Tue, 2017-12-26 at 12:50 +0100, Martin Blumenstingl wrote:
> > > Commit a5a10afe04ef ("reset: meson: add level reset support for GX SoC
> > > family") only enabled the level resets for the newer GX SoC family.
> > > However, the older 32-Meson SoCs (Meson8, Meson8b and Meson8m2) also
> > > support level resets using the same offset as the newer GX SoCs.
> > > 
> > > This removes the separation between Meson8b and the GX SoCs from the
> > > reset-meson driver to enable the level resets also on Meson8b.
> > > 
> > > Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
> > 
> > Thank you for the patch.?It looks fine to me, not knowing the hardware
> > details.
> > The referenced commit made it sound like reset level handling on Meson8
> > is different from GX, though. Could somebody clarify?
> > 
> > regards
> > Philipp
> > 
> 
> Hi Philipp,
> 
> This is highly undocumented and needs reading the vendor source code and experimenting,
> this patch is ok for me. Seems the register mapping did not change for a long time since
> it's still the same on the latest AXG family.
> 
> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>

Thank you, applied it to reset/next with your R-b.

regards
Philipp

[PATCH] reset: meson: enable level reset support on Meson8b

[Martin Blumenstingl]

Hi Philipp,

On Tue, Jan 2, 2018 at 2:01 PM, Philipp Zabel <p.zabel@pengutronix.de> wrote:
> On Tue, 2018-01-02 at 13:49 +0100, Neil Armstrong wrote:
>> On 02/01/2018 12:35, Philipp Zabel wrote:
>> > Hi Martin,
>> >
>> > On Tue, 2017-12-26 at 12:50 +0100, Martin Blumenstingl wrote:
>> > > Commit a5a10afe04ef ("reset: meson: add level reset support for GX SoC
>> > > family") only enabled the level resets for the newer GX SoC family.
>> > > However, the older 32-Meson SoCs (Meson8, Meson8b and Meson8m2) also
>> > > support level resets using the same offset as the newer GX SoCs.
>> > >
>> > > This removes the separation between Meson8b and the GX SoCs from the
>> > > reset-meson driver to enable the level resets also on Meson8b.
>> > >
>> > > Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
>> >
>> > Thank you for the patch. It looks fine to me, not knowing the hardware
>> > details.
>> > The referenced commit made it sound like reset level handling on Meson8
>> > is different from GX, though. Could somebody clarify?
>> >
>> > regards
>> > Philipp
>> >
>>
>> Hi Philipp,
>>
>> This is highly undocumented and needs reading the vendor source code and experimenting,
>> this patch is ok for me. Seems the register mapping did not change for a long time since
>> it's still the same on the latest AXG family.
>>
>> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
>
> Thank you, applied it to reset/next with your R-b.
thank you

I guess I could have been a bit more verbose in the commit message:
as Neil already said our public datasheet doesn't mention these
registers (neither on GXBB, GXL, GXM nor Meson8b)
however, the vendor kernel sources contain enough information: [0]
- the reset controller starts at CBUS (0x1101 * 4)
- the RESET0_LEVEL register is at CBUS (0x1120 * 4)
- offset between start and the LEVEL registers: (0x1120 - 0x1101) * 4 = 0x7c

I tested this with the dwmac (Ethernet) reset:
I modified the stmmac driver so it only asserts the reset, but never
de-asserts it:
this breaks ethernet - and even if I reboot into u-boot ethernet is
dead (I have to do a full power-cycle to get it working again)
with the unmodified stmmac driver (which de-asserts the reset line
again) both the stmmac driver itself and u-boot are working fine again


Regards
Martin


[0] https://github.com/endlessm/linux-meson/blob/af743b87ad00dad42a4af84d0445f45ef251d046/arch/arm/mach-meson8b/include/mach/register.h#L1015