* [PATCH v2 0/2] arm64: dts: amlogic: s4: mmc clock fixups
@ 2026-01-14 8:56 Jerome Brunet
2026-01-14 8:56 ` [PATCH v2 1/2] arm64: dts: amlogic: s4: assign mmc b clock to 24MHz Jerome Brunet
2026-01-14 8:56 ` [PATCH v2 2/2] arm64: dts: amlogic: s4: fix mmc clock assignment Jerome Brunet
0 siblings, 2 replies; 5+ messages in thread
From: Jerome Brunet @ 2026-01-14 8:56 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Neil Armstrong,
Kevin Hilman, Martin Blumenstingl, Xianwei Zhao, Nick Xie
Cc: devicetree, linux-arm-kernel, linux-amlogic, linux-kernel, Jerome Brunet
The patchset aims to address the issue raised here [1] for MMC B.
While checking this issue, I've found that MMC A and C also appear to be
improperly described in this platform's DT. The 2nd change fixes that.
To be on the safe side, the MMC clock should also be assigned on the other
SoCs. More changes will follow once things are sorted out for s4.
[1]: https://lore.kernel.org/linux-amlogic/20260113011931.40424-1-nick@khadas.com/
Changes in v2:
- Collect Tested-by from Nick
- Fix some typos in the commit description
- Link to v1: https://lore.kernel.org/r/20260113-amlogic-s4-mmc-fixup-v1-0-1ab1fca0fb2f@baylibre.com
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
---
Jerome Brunet (2):
arm64: dts: amlogic: s4: assign mmc b clock to 24MHz
arm64: dts: amlogic: s4: fix mmc clock assignment
arch/arm64/boot/dts/amlogic/meson-s4.dtsi | 16 ++++++++++++++--
1 file changed, 14 insertions(+), 2 deletions(-)
---
base-commit: 8f0b4cce4481fb22653697cced8d0d04027cb1e8
change-id: 20260113-amlogic-s4-mmc-fixup-92ad8b90b7be
Best regards,
--
Jerome
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^ permalink raw reply [flat|nested] 5+ messages in thread* [PATCH v2 1/2] arm64: dts: amlogic: s4: assign mmc b clock to 24MHz
2026-01-14 8:56 [PATCH v2 0/2] arm64: dts: amlogic: s4: mmc clock fixups Jerome Brunet
@ 2026-01-14 8:56 ` Jerome Brunet
2026-01-14 9:05 ` Neil Armstrong
2026-01-14 8:56 ` [PATCH v2 2/2] arm64: dts: amlogic: s4: fix mmc clock assignment Jerome Brunet
1 sibling, 1 reply; 5+ messages in thread
From: Jerome Brunet @ 2026-01-14 8:56 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Neil Armstrong,
Kevin Hilman, Martin Blumenstingl, Xianwei Zhao, Nick Xie
Cc: devicetree, linux-arm-kernel, linux-amlogic, linux-kernel, Jerome Brunet
The amlogic MMC driver operate with the assumption that MMC clock
is configured to provide 24MHz. It uses this path for low
rates such as 400kHz.
This assumption did hold true until but it now, but it is apparently
not the case with s4. The clock has been reported to provide 1GHz
instead. This is most likely due to how the bootloader is using the MMC
clock on this platform.
Regardless of why the MMC clock rate is 1GHz, if the MMC driver expects
24MHz, the clock should be properly assigned, so assign it.
Reported-by: Nick Xie <nick@khadas.com>
Closes: https://lore.kernel.org/linux-amlogic/20260113011931.40424-1-nick@khadas.com/
Fixes: 3ab9d54b5d84 ("arm64: dts: amlogic: enable some device nodes for S4")
Tested-by: Nick Xie <nick@khadas.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
---
arch/arm64/boot/dts/amlogic/meson-s4.dtsi | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-s4.dtsi b/arch/arm64/boot/dts/amlogic/meson-s4.dtsi
index 9d99ed2994df..62538fd9db6b 100644
--- a/arch/arm64/boot/dts/amlogic/meson-s4.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-s4.dtsi
@@ -838,6 +838,10 @@ sd: mmc@fe08a000 {
clock-names = "core", "clkin0", "clkin1";
resets = <&reset RESET_SD_EMMC_B>;
status = "disabled";
+
+ assigned-clocks = <&clkc_periphs CLKID_SD_EMMC_B>;
+ assigned-clock-parents = <0>;
+ assigned-clock-rates = <24000000>;
};
emmc: mmc@fe08c000 {
--
2.47.3
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^ permalink raw reply [flat|nested] 5+ messages in thread* Re: [PATCH v2 1/2] arm64: dts: amlogic: s4: assign mmc b clock to 24MHz
2026-01-14 8:56 ` [PATCH v2 1/2] arm64: dts: amlogic: s4: assign mmc b clock to 24MHz Jerome Brunet
@ 2026-01-14 9:05 ` Neil Armstrong
2026-01-14 10:40 ` Jerome Brunet
0 siblings, 1 reply; 5+ messages in thread
From: Neil Armstrong @ 2026-01-14 9:05 UTC (permalink / raw)
To: Jerome Brunet, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Kevin Hilman, Martin Blumenstingl, Xianwei Zhao, Nick Xie
Cc: devicetree, linux-arm-kernel, linux-amlogic, linux-kernel
On 1/14/26 09:56, Jerome Brunet wrote:
> The amlogic MMC driver operate with the assumption that MMC clock
> is configured to provide 24MHz. It uses this path for low
> rates such as 400kHz.
>
> This assumption did hold true until but it now, but it is apparently
> not the case with s4. The clock has been reported to provide 1GHz
> instead. This is most likely due to how the bootloader is using the MMC
> clock on this platform.
>
> Regardless of why the MMC clock rate is 1GHz, if the MMC driver expects
> 24MHz, the clock should be properly assigned, so assign it.
>
> Reported-by: Nick Xie <nick@khadas.com>
> Closes: https://lore.kernel.org/linux-amlogic/20260113011931.40424-1-nick@khadas.com/
> Fixes: 3ab9d54b5d84 ("arm64: dts: amlogic: enable some device nodes for S4")
> Tested-by: Nick Xie <nick@khadas.com>
> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
> ---
> arch/arm64/boot/dts/amlogic/meson-s4.dtsi | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/amlogic/meson-s4.dtsi b/arch/arm64/boot/dts/amlogic/meson-s4.dtsi
> index 9d99ed2994df..62538fd9db6b 100644
> --- a/arch/arm64/boot/dts/amlogic/meson-s4.dtsi
> +++ b/arch/arm64/boot/dts/amlogic/meson-s4.dtsi
> @@ -838,6 +838,10 @@ sd: mmc@fe08a000 {
> clock-names = "core", "clkin0", "clkin1";
> resets = <&reset RESET_SD_EMMC_B>;
> status = "disabled";
> +
> + assigned-clocks = <&clkc_periphs CLKID_SD_EMMC_B>;
> + assigned-clock-parents = <0>;
In this case, assigned-clock-parents should be dropped.
Neil
> + assigned-clock-rates = <24000000>;
> };
>
> emmc: mmc@fe08c000 {
>
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^ permalink raw reply [flat|nested] 5+ messages in thread* Re: [PATCH v2 1/2] arm64: dts: amlogic: s4: assign mmc b clock to 24MHz
2026-01-14 9:05 ` Neil Armstrong
@ 2026-01-14 10:40 ` Jerome Brunet
0 siblings, 0 replies; 5+ messages in thread
From: Jerome Brunet @ 2026-01-14 10:40 UTC (permalink / raw)
To: Neil Armstrong
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Kevin Hilman,
Martin Blumenstingl, Xianwei Zhao, Nick Xie, devicetree,
linux-arm-kernel, linux-amlogic, linux-kernel
On mer. 14 janv. 2026 at 10:05, Neil Armstrong <neil.armstrong@linaro.org> wrote:
> On 1/14/26 09:56, Jerome Brunet wrote:
>> The amlogic MMC driver operate with the assumption that MMC clock
>> is configured to provide 24MHz. It uses this path for low
>> rates such as 400kHz.
>> This assumption did hold true until but it now, but it is apparently
>> not the case with s4. The clock has been reported to provide 1GHz
>> instead. This is most likely due to how the bootloader is using the MMC
>> clock on this platform.
>> Regardless of why the MMC clock rate is 1GHz, if the MMC driver expects
>> 24MHz, the clock should be properly assigned, so assign it.
>> Reported-by: Nick Xie <nick@khadas.com>
>> Closes: https://lore.kernel.org/linux-amlogic/20260113011931.40424-1-nick@khadas.com/
>> Fixes: 3ab9d54b5d84 ("arm64: dts: amlogic: enable some device nodes for S4")
>> Tested-by: Nick Xie <nick@khadas.com>
>> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
>> ---
>> arch/arm64/boot/dts/amlogic/meson-s4.dtsi | 4 ++++
>> 1 file changed, 4 insertions(+)
>> diff --git a/arch/arm64/boot/dts/amlogic/meson-s4.dtsi
>> b/arch/arm64/boot/dts/amlogic/meson-s4.dtsi
>> index 9d99ed2994df..62538fd9db6b 100644
>> --- a/arch/arm64/boot/dts/amlogic/meson-s4.dtsi
>> +++ b/arch/arm64/boot/dts/amlogic/meson-s4.dtsi
>> @@ -838,6 +838,10 @@ sd: mmc@fe08a000 {
>> clock-names = "core", "clkin0", "clkin1";
>> resets = <&reset RESET_SD_EMMC_B>;
>> status = "disabled";
>> +
>> + assigned-clocks = <&clkc_periphs CLKID_SD_EMMC_B>;
>> + assigned-clock-parents = <0>;
>
> In this case, assigned-clock-parents should be dropped.
>
Dunno why I thought that was always required. I'll fix it and the other
instances
> Neil
>
>> + assigned-clock-rates = <24000000>;
>> };
>> emmc: mmc@fe08c000 {
>>
--
Jerome
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^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH v2 2/2] arm64: dts: amlogic: s4: fix mmc clock assignment
2026-01-14 8:56 [PATCH v2 0/2] arm64: dts: amlogic: s4: mmc clock fixups Jerome Brunet
2026-01-14 8:56 ` [PATCH v2 1/2] arm64: dts: amlogic: s4: assign mmc b clock to 24MHz Jerome Brunet
@ 2026-01-14 8:56 ` Jerome Brunet
1 sibling, 0 replies; 5+ messages in thread
From: Jerome Brunet @ 2026-01-14 8:56 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Neil Armstrong,
Kevin Hilman, Martin Blumenstingl, Xianwei Zhao, Nick Xie
Cc: devicetree, linux-arm-kernel, linux-amlogic, linux-kernel, Jerome Brunet
MMC A and C are mis-represented as having their "clkin0" input connected to
xtal while it is actually connected to the MMC clock, probably in an
attempt to provide 24MHz to the device on this input.
Fix this and assign the clock to 24MHz to actually provide the required
rate.
Fixes: 3ab9d54b5d84 ("arm64: dts: amlogic: enable some device nodes for S4")
Tested-by: Nick Xie <nick@khadas.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
---
arch/arm64/boot/dts/amlogic/meson-s4.dtsi | 12 ++++++++++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/amlogic/meson-s4.dtsi b/arch/arm64/boot/dts/amlogic/meson-s4.dtsi
index 62538fd9db6b..6324d1eb5994 100644
--- a/arch/arm64/boot/dts/amlogic/meson-s4.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-s4.dtsi
@@ -819,13 +819,17 @@ sdio: mmc@fe088000 {
reg = <0x0 0xfe088000 0x0 0x800>;
interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clkc_periphs CLKID_SDEMMC_A>,
- <&xtal>,
+ <&clkc_periphs CLKID_SD_EMMC_A>,
<&clkc_pll CLKID_FCLK_DIV2>;
clock-names = "core", "clkin0", "clkin1";
resets = <&reset RESET_SD_EMMC_A>;
cap-sdio-irq;
keep-power-in-suspend;
status = "disabled";
+
+ assigned-clocks = <&clkc_periphs CLKID_SD_EMMC_A>;
+ assigned-clock-parents = <0>;
+ assigned-clock-rates = <24000000>;
};
sd: mmc@fe08a000 {
@@ -849,13 +853,17 @@ emmc: mmc@fe08c000 {
reg = <0x0 0xfe08c000 0x0 0x800>;
interrupts = <GIC_SPI 178 IRQ_TYPE_EDGE_RISING>;
clocks = <&clkc_periphs CLKID_NAND>,
- <&xtal>,
+ <&clkc_periphs CLKID_SD_EMMC_C>,
<&clkc_pll CLKID_FCLK_DIV2>;
clock-names = "core", "clkin0", "clkin1";
resets = <&reset RESET_NAND_EMMC>;
no-sdio;
no-sd;
status = "disabled";
+
+ assigned-clocks = <&clkc_periphs CLKID_SD_EMMC_C>;
+ assigned-clock-parents = <0>;
+ assigned-clock-rates = <24000000>;
};
};
};
--
2.47.3
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^ permalink raw reply [flat|nested] 5+ messages in thread
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2026-01-14 9:05 ` Neil Armstrong
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