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From: Dmitry Rokosov <ddrokosov@sberdevices.ru>
To: <neil.armstrong@linaro.org>, <jbrunet@baylibre.com>,
	<mturquette@baylibre.com>, <sboyd@kernel.org>,
	<robh+dt@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>,
	<khilman@baylibre.com>, <martin.blumenstingl@googlemail.com>
Cc: <jian.hu@amlogic.com>, <kernel@sberdevices.ru>,
	<rockosov@gmail.com>, <linux-amlogic@lists.infradead.org>,
	<linux-clk@vger.kernel.org>, <devicetree@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	Dmitry Rokosov <ddrokosov@sberdevices.ru>
Subject: [PATCH v8 05/11] clk: meson: pll: export meson_clk_pll_wait_lock symbol
Date: Fri, 2 Dec 2022 01:56:57 +0300	[thread overview]
Message-ID: <20221201225703.6507-6-ddrokosov@sberdevices.ru> (raw)
In-Reply-To: <20221201225703.6507-1-ddrokosov@sberdevices.ru>

Modern meson PLL IPs are a little bit different from early known PLLs.
The main difference is located in the init/enable/disable sequences; the
rate logic is the same. So drivers for the new PLLs can be inherited
from the clk-pll driver and redefine init/enable/disable routines only.
For that purpose we need to have meson_clk_pll_wait_lock() in the export
symbols list, because each lock operation should be ended with wait
cycles.

Signed-off-by: Dmitry Rokosov <ddrokosov@sberdevices.ru>
---
 drivers/clk/meson/clk-pll.c | 3 ++-
 drivers/clk/meson/clk-pll.h | 2 ++
 2 files changed, 4 insertions(+), 1 deletion(-)

diff --git a/drivers/clk/meson/clk-pll.c b/drivers/clk/meson/clk-pll.c
index 9e55617bc3b4..81c810d57a48 100644
--- a/drivers/clk/meson/clk-pll.c
+++ b/drivers/clk/meson/clk-pll.c
@@ -273,7 +273,7 @@ static int meson_clk_pll_determine_rate(struct clk_hw *hw,
 	return 0;
 }
 
-static int meson_clk_pll_wait_lock(struct clk_hw *hw)
+int meson_clk_pll_wait_lock(struct clk_hw *hw)
 {
 	struct clk_regmap *clk = to_clk_regmap(hw);
 	struct meson_clk_pll_data *pll = meson_clk_pll_data(clk);
@@ -289,6 +289,7 @@ static int meson_clk_pll_wait_lock(struct clk_hw *hw)
 
 	return -ETIMEDOUT;
 }
+EXPORT_SYMBOL_GPL(meson_clk_pll_wait_lock);
 
 static int meson_clk_pll_init(struct clk_hw *hw)
 {
diff --git a/drivers/clk/meson/clk-pll.h b/drivers/clk/meson/clk-pll.h
index 367efd0f6410..85fec18c4b8a 100644
--- a/drivers/clk/meson/clk-pll.h
+++ b/drivers/clk/meson/clk-pll.h
@@ -47,4 +47,6 @@ extern const struct clk_ops meson_clk_pll_ro_ops;
 extern const struct clk_ops meson_clk_pll_ops;
 extern const struct clk_ops meson_clk_pcie_pll_ops;
 
+int meson_clk_pll_wait_lock(struct clk_hw *hw);
+
 #endif /* __MESON_CLK_PLL_H */
-- 
2.36.0


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  parent reply	other threads:[~2022-12-01 23:31 UTC|newest]

Thread overview: 45+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-12-01 22:56 [PATCH v8 00/11] add Amlogic A1 clock controller drivers Dmitry Rokosov
2022-12-01 22:56 ` [PATCH v8 01/11] dt-bindings: clock: meson: add A1 PLL clock controller bindings Dmitry Rokosov
2022-12-02  4:10   ` Rob Herring
2022-12-02  9:51     ` Dmitry Rokosov
2022-12-02 10:39       ` Krzysztof Kozlowski
2022-12-02 11:04         ` Jerome Brunet
2022-12-02 11:16           ` Krzysztof Kozlowski
2022-12-02 11:28             ` Dmitry Rokosov
2022-12-02 13:36               ` neil.armstrong
2022-12-02 10:42   ` Krzysztof Kozlowski
2022-12-02 11:18     ` Dmitry Rokosov
2022-12-02 11:11   ` Jerome Brunet
2022-12-02 12:26     ` Dmitry Rokosov
2022-12-01 22:56 ` [PATCH v8 02/11] clk: meson: a1: add support for Amlogic A1 PLL clock driver Dmitry Rokosov
2022-12-02 11:16   ` Jerome Brunet
2022-12-02 11:31     ` Dmitry Rokosov
2022-12-01 22:56 ` [PATCH v8 03/11] dt-bindings: clock: meson: add A1 peripheral clock controller bindings Dmitry Rokosov
2022-12-02  4:10   ` Rob Herring
2022-12-02  9:49     ` Dmitry Rokosov
2022-12-02 10:39       ` Krzysztof Kozlowski
2022-12-02 10:58         ` Dmitry Rokosov
2022-12-02 10:43   ` Krzysztof Kozlowski
2022-12-01 22:56 ` [PATCH v8 04/11] clk: meson: a1: add support for Amlogic A1 Peripheral clock driver Dmitry Rokosov
2022-12-02 11:19   ` Jerome Brunet
2022-12-02 12:33     ` Dmitry Rokosov
2022-12-01 22:56 ` Dmitry Rokosov [this message]
2022-12-01 22:56 ` [PATCH v8 06/11] clk: meson: introduce a1-clkc common driver for all A1 clock controllers Dmitry Rokosov
2022-12-02 11:36   ` Jerome Brunet
2022-12-02 11:58     ` Dmitry Rokosov
2022-12-01 22:56 ` [PATCH v8 07/11] clk: meson: a1: redesign Amlogic A1 PLL clock controller Dmitry Rokosov
2022-12-02 11:42   ` Jerome Brunet
2022-12-02 12:47     ` Dmitry Rokosov
2022-12-02 12:49       ` Jerome Brunet
2022-12-02 18:20         ` Dmitry Rokosov
2022-12-01 22:57 ` [PATCH v8 08/11] dt-bindings: clock: meson: fixup A1 PLL clkc dtb_check errors Dmitry Rokosov
2022-12-02 10:40   ` Krzysztof Kozlowski
2022-12-01 22:57 ` [PATCH v8 09/11] clk: meson: redesign A1 Peripherals CLK controller Dmitry Rokosov
2022-12-02 12:01   ` Jerome Brunet
2022-12-02 12:10     ` Dmitry Rokosov
2022-12-01 22:57 ` [PATCH v8 10/11] dt-bindings: clock: meson: fixup A1 peripherals clkc dtb_check errors Dmitry Rokosov
2022-12-02 10:40   ` Krzysztof Kozlowski
2022-12-01 22:57 ` [PATCH v8 11/11] arm64: dts: meson: a1: introduce PLL and Peripherals clk controllers Dmitry Rokosov
2022-12-02 10:43   ` Krzysztof Kozlowski
2022-12-02 12:03   ` Jerome Brunet
2022-12-02 13:37     ` neil.armstrong

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