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From: Dmitry Rokosov <ddrokosov@sberdevices.ru>
To: Jerome Brunet <jbrunet@baylibre.com>
Cc: <neil.armstrong@linaro.org>, <mturquette@baylibre.com>,
	<sboyd@kernel.org>, <robh+dt@kernel.org>,
	<krzysztof.kozlowski+dt@linaro.org>, <khilman@baylibre.com>,
	<martin.blumenstingl@googlemail.com>, <jian.hu@amlogic.com>,
	<kernel@sberdevices.ru>, <rockosov@gmail.com>,
	<linux-amlogic@lists.infradead.org>, <linux-clk@vger.kernel.org>,
	<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH v8 01/11] dt-bindings: clock: meson: add A1 PLL clock controller bindings
Date: Fri, 2 Dec 2022 15:26:50 +0300	[thread overview]
Message-ID: <20221202122650.bybwjszlgdnu3zvm@CAB-WSD-L081021> (raw)
In-Reply-To: <1jbkom83fg.fsf@starbuckisacylon.baylibre.com>

On Fri, Dec 02, 2022 at 12:11:53PM +0100, Jerome Brunet wrote:
> 
> On Fri 02 Dec 2022 at 01:56, Dmitry Rokosov <ddrokosov@sberdevices.ru> wrote:
> 
> > From: Jian Hu <jian.hu@amlogic.com>
> >
> > Add the documentation to support Amlogic A1 PLL clock driver,
> > and add A1 PLL clock controller bindings.
> >
> > Signed-off-by: Jian Hu <jian.hu@amlogic.com>
> > Signed-off-by: Dmitry Rokosov <ddrokosov@sberdevices.ru>
> > ---
> >  .../bindings/clock/amlogic,a1-pll-clkc.yaml   | 52 +++++++++++++++++++
> >  include/dt-bindings/clock/a1-pll-clkc.h       | 16 ++++++
> >  2 files changed, 68 insertions(+)
> >  create mode 100644 Documentation/devicetree/bindings/clock/amlogic,a1-pll-clkc.yaml
> >  create mode 100644 include/dt-bindings/clock/a1-pll-clkc.h
> >
> > diff --git a/Documentation/devicetree/bindings/clock/amlogic,a1-pll-clkc.yaml b/Documentation/devicetree/bindings/clock/amlogic,a1-pll-clkc.yaml
> > new file mode 100644
> > index 000000000000..d67250fbeece
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/clock/amlogic,a1-pll-clkc.yaml
> > @@ -0,0 +1,52 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: "http://devicetree.org/schemas/amlogic,a1-pll-clkc.yaml#"
> > +$schema: "http://devicetree.org/meta-schemas/core.yaml#"
> > +
> > +title: Amlogic Meson A/C serials PLL Clock Control Unit Device Tree Bindings
> > +
> > +maintainers:
> > +  - Neil Armstrong <narmstrong@baylibre.com>
> > +  - Jerome Brunet <jbrunet@baylibre.com>
> > +  - Jian Hu <jian.hu@jian.hu.com>
> > +
> > +properties:
> > +  compatible:
> > +    const: amlogic,a1-pll-clkc
> > +
> > +  "#clock-cells":
> > +    const: 1
> > +
> > +  reg:
> > +    maxItems: 1
> > +
> > +  clocks:
> > +    items:
> > +     - description: input xtal_fixpll
> > +     - description: input xtal_hifipll
> > +
> > +  clock-names:
> > +    items:
> > +      - const: xtal_fixpll
> > +      - const: xtal_hifipll
> 
> Do we really need the "xtal_" prefix ?
> 
> Seems like the clock is the PLL, not the xtal
> 

This name was formed from specification registers description. Register
CLKTREE_SYS_OSCIN_CTRL has "gate en" field which calls "xtal ->
HIFIPLL", therefore if was transformed to xtal_hifipll name.

But I agree with you, that "hifipll" is better name choice.
 
-- 
Thank you,
Dmitry

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linux-amlogic@lists.infradead.org
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  reply	other threads:[~2022-12-02 12:27 UTC|newest]

Thread overview: 45+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-12-01 22:56 [PATCH v8 00/11] add Amlogic A1 clock controller drivers Dmitry Rokosov
2022-12-01 22:56 ` [PATCH v8 01/11] dt-bindings: clock: meson: add A1 PLL clock controller bindings Dmitry Rokosov
2022-12-02  4:10   ` Rob Herring
2022-12-02  9:51     ` Dmitry Rokosov
2022-12-02 10:39       ` Krzysztof Kozlowski
2022-12-02 11:04         ` Jerome Brunet
2022-12-02 11:16           ` Krzysztof Kozlowski
2022-12-02 11:28             ` Dmitry Rokosov
2022-12-02 13:36               ` neil.armstrong
2022-12-02 10:42   ` Krzysztof Kozlowski
2022-12-02 11:18     ` Dmitry Rokosov
2022-12-02 11:11   ` Jerome Brunet
2022-12-02 12:26     ` Dmitry Rokosov [this message]
2022-12-01 22:56 ` [PATCH v8 02/11] clk: meson: a1: add support for Amlogic A1 PLL clock driver Dmitry Rokosov
2022-12-02 11:16   ` Jerome Brunet
2022-12-02 11:31     ` Dmitry Rokosov
2022-12-01 22:56 ` [PATCH v8 03/11] dt-bindings: clock: meson: add A1 peripheral clock controller bindings Dmitry Rokosov
2022-12-02  4:10   ` Rob Herring
2022-12-02  9:49     ` Dmitry Rokosov
2022-12-02 10:39       ` Krzysztof Kozlowski
2022-12-02 10:58         ` Dmitry Rokosov
2022-12-02 10:43   ` Krzysztof Kozlowski
2022-12-01 22:56 ` [PATCH v8 04/11] clk: meson: a1: add support for Amlogic A1 Peripheral clock driver Dmitry Rokosov
2022-12-02 11:19   ` Jerome Brunet
2022-12-02 12:33     ` Dmitry Rokosov
2022-12-01 22:56 ` [PATCH v8 05/11] clk: meson: pll: export meson_clk_pll_wait_lock symbol Dmitry Rokosov
2022-12-01 22:56 ` [PATCH v8 06/11] clk: meson: introduce a1-clkc common driver for all A1 clock controllers Dmitry Rokosov
2022-12-02 11:36   ` Jerome Brunet
2022-12-02 11:58     ` Dmitry Rokosov
2022-12-01 22:56 ` [PATCH v8 07/11] clk: meson: a1: redesign Amlogic A1 PLL clock controller Dmitry Rokosov
2022-12-02 11:42   ` Jerome Brunet
2022-12-02 12:47     ` Dmitry Rokosov
2022-12-02 12:49       ` Jerome Brunet
2022-12-02 18:20         ` Dmitry Rokosov
2022-12-01 22:57 ` [PATCH v8 08/11] dt-bindings: clock: meson: fixup A1 PLL clkc dtb_check errors Dmitry Rokosov
2022-12-02 10:40   ` Krzysztof Kozlowski
2022-12-01 22:57 ` [PATCH v8 09/11] clk: meson: redesign A1 Peripherals CLK controller Dmitry Rokosov
2022-12-02 12:01   ` Jerome Brunet
2022-12-02 12:10     ` Dmitry Rokosov
2022-12-01 22:57 ` [PATCH v8 10/11] dt-bindings: clock: meson: fixup A1 peripherals clkc dtb_check errors Dmitry Rokosov
2022-12-02 10:40   ` Krzysztof Kozlowski
2022-12-01 22:57 ` [PATCH v8 11/11] arm64: dts: meson: a1: introduce PLL and Peripherals clk controllers Dmitry Rokosov
2022-12-02 10:43   ` Krzysztof Kozlowski
2022-12-02 12:03   ` Jerome Brunet
2022-12-02 13:37     ` neil.armstrong

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