Re: [PATCH v2 2/2] PCI: Remove redundant MPS configuration

From: Hans Zhang <18255117159@163.com>
To: neil.armstrong@linaro.org, lpieralisi@kernel.org, kw@linux.com,
	bhelgaas@google.com, heiko@sntech.de,
	thomas.petazzoni@bootlin.com, manivannan.sadhasivam@linaro.org,
	yue.wang@Amlogic.com
Cc: pali@kernel.org, robh@kernel.org, jingoohan1@gmail.com,
	khilman@baylibre.com, jbrunet@baylibre.com,
	martin.blumenstingl@googlemail.com, linux-pci@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-amlogic@lists.infradead.org,
	linux-rockchip@lists.infradead.org
Subject: Re: [PATCH v2 2/2] PCI: Remove redundant MPS configuration
Date: Fri, 25 Apr 2025 22:20:30 +0800	[thread overview]
Message-ID: <a6e097e4-6d57-4db2-a541-ebd9e4a9856b@163.com> (raw)
In-Reply-To: <e6752451-4492-4ae2-9bad-3865c4945dbe@linaro.org>

On 2025/4/25 19:59, neil.armstrong@linaro.org wrote:
> On 25/04/2025 11:57, Hans Zhang wrote:
>> With the PCI core now centrally configuring root port MPS to
>> hardware-supported maximums (via 128 << pcie_mpss) during host probing,
>> platform-specific MPS adjustments are redundant. This patch removes the
>> custom the configuration of the max payload logic to align with the
>> standardized initialization flow.
>>
>> By eliminating redundant code, this change prevents conflicts with global
>> PCIe hierarchy tuning policies and reduces maintenance overhead. The 
>> Meson
>> driver now fully relies on the core PCI framework for MPS configuration,
>> ensuring consistency across the PCIe topology while preserving
>> hardware-specific MRRS handling.
>>
>> Signed-off-by: Hans Zhang <18255117159@163.com>
>> ---
>>   drivers/pci/controller/dwc/pci-meson.c | 17 -----------------
>>   drivers/pci/controller/pci-aardvark.c  |  2 --
>>   2 files changed, 19 deletions(-)
>>
>> diff --git a/drivers/pci/controller/dwc/pci-meson.c 
>> b/drivers/pci/controller/dwc/pci-meson.c
>> index db9482a113e9..126f38ed453d 100644
>> --- a/drivers/pci/controller/dwc/pci-meson.c
>> +++ b/drivers/pci/controller/dwc/pci-meson.c
>> @@ -261,22 +261,6 @@ static int meson_size_to_payload(struct 
>> meson_pcie *mp, int size)
>>       return fls(size) - 8;
>>   }
>> -static void meson_set_max_payload(struct meson_pcie *mp, int size)
>> -{
>> -    struct dw_pcie *pci = &mp->pci;
>> -    u32 val;
>> -    u16 offset = dw_pcie_find_capability(pci, PCI_CAP_ID_EXP);
>> -    int max_payload_size = meson_size_to_payload(mp, size);
>> -
>> -    val = dw_pcie_readl_dbi(pci, offset + PCI_EXP_DEVCTL);
>> -    val &= ~PCI_EXP_DEVCTL_PAYLOAD;
>> -    dw_pcie_writel_dbi(pci, offset + PCI_EXP_DEVCTL, val);
>> -
>> -    val = dw_pcie_readl_dbi(pci, offset + PCI_EXP_DEVCTL);
>> -    val |= PCIE_CAP_MAX_PAYLOAD_SIZE(max_payload_size);
>> -    dw_pcie_writel_dbi(pci, offset + PCI_EXP_DEVCTL, val);
>> -}
>> -
>>   static void meson_set_max_rd_req_size(struct meson_pcie *mp, int size)
>>   {
>>       struct dw_pcie *pci = &mp->pci;
>> @@ -381,7 +365,6 @@ static int meson_pcie_host_init(struct dw_pcie_rp 
>> *pp)
>>       pp->bridge->ops = &meson_pci_ops;
>> -    meson_set_max_payload(mp, MAX_PAYLOAD_SIZE);
>>       meson_set_max_rd_req_size(mp, MAX_READ_REQ_SIZE);
> 
> Seems you can also remove meson_set_max_rd_req_size() since it's
> done by pcie_write_mrrs()

Dear neil,

Thank you very much for your reply and reminder.

I want to wait for the result of the first patch discussion, and then 
see if we need to remove meson_set_max_rd_req_size().

Best regards,
Hans

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