From: Carlo Caione <ccaione@baylibre.com>
To: Conor Dooley <conor@kernel.org>
Cc: Stephen Boyd <sboyd@kernel.org>,
Brian Masney <bmasney+clk@redhat.com>,
Jerome Brunet <jbrunet+clk@baylibre.com>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Neil Armstrong <neil.armstrong@linaro.org>,
Jerome Brunet <jbrunet@baylibre.com>,
Kevin Hilman <khilman@baylibre.com>,
Martin Blumenstingl <martin.blumenstingl@googlemail.com>,
Jian Hu <jian.hu@amlogic.com>, Chuan Liu <chuan.liu@amlogic.com>,
linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org,
devicetree@vger.kernel.org, linux-amlogic@lists.infradead.org,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 6/7] dt-bindings: clock: Add Amlogic S7 peripherals clock controller
Date: Fri, 6 Nov 2026 23:27:38 +0100 [thread overview]
Message-ID: <au5RoF6BooP14xhY@macbook> (raw)
In-Reply-To: <20261106-headband-buckwheat-fecbd459ee85@spud>
On Fri, Nov 06, 2026 at 20:48:01 +0100, Conor Dooley wrote:
> On Fri, Nov 06, 2026 at 08:34:37PM +0100, Carlo Caione wrote:
> > On Fri, Nov 06, 2026 at 17:34:14 +0100, Conor Dooley wrote:
> >
> > > > + #include <dt-bindings/clock/amlogic,s7-pll-clkc.h>
> > > > + #include <dt-bindings/clock/amlogic,s7-scmi-clkc.h>
> > > > +
> > > > + soc {
> > > > + #address-cells = <2>;
> > > > + #size-cells = <2>;
> > > > +
> > > > + clock-controller@0 {
> > > > + compatible = "amlogic,s7-peripherals-clkc";
> > > > + reg = <0x0 0x0 0x0 0x49c>;
> > >
> > > What's with the weird numbers in this example?
> > >
> > > Examples don't have to be real, but when it looks like this the
> > > immediate thought is that the modelling of the device might be
> > > incorrec.t
> >
> > The numbers are actually real, but the example simply lost their context
> > because I copied the node from the S7 dtsi (not yet submitted), where
> > the controller sits under the APB bus node (bus@fe000000) and the bus
> > ranges make the addresses relative to it.
> >
> > apb: bus@fe000000 {
> > compatible = "simple-bus";
> > reg = <0x0 0xfe000000 0x0 0x480000>;
> > #address-cells = <2>;
> > #size-cells = <2>;
> > ranges = <0x0 0x0 0x0 0xfe000000 0x0 0x480000>;
> >
> > clkc_periphs: clock-controller@0 {
> > compatible = "amlogic,s7-peripherals-clkc";
> > reg = <0x0 0x0 0x0 0x49c>;
> > #clock-cells = <1>;
> > ...
> >
> > In V2 I'll use an absolute address for the sake of clarity (PLL has the
> > same issue).
>
> Before you do that, can you please share with me the s7 dtsi? Cos surely
> you've got it in some git repo online somewhere.
The S7 dtsi is already upstream at [0], the peripheral clock controller
and PLL will be enabled in that DTSI with a following series after the
bindings and the drivers in this set are acked, following the diffs that
will be submitted:
diff --git a/arch/arm64/boot/dts/amlogic/amlogic-s7.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-s7.dtsi
index 2c204dcebbba..5f2a61f42cbd 100644
--- a/arch/arm64/boot/dts/amlogic/amlogic-s7.dtsi
+++ b/arch/arm64/boot/dts/amlogic/amlogic-s7.dtsi
@@ -7,6 +7,8 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/amlogic,pinctrl.h>
+#include <dt-bindings/clock/amlogic,s7-pll-clkc.h>
+#include <dt-bindings/clock/amlogic,s7-scmi-clkc.h>
#include <dt-bindings/power/amlogic,s7-pwrc.h>
/ {
@@ -160,6 +162,22 @@ apb: bus@fe000000 {
#size-cells = <2>;
ranges = <0x0 0x0 0x0 0xfe000000 0x0 0x480000>;
+ clkc_pll: clock-controller@8000 {
+ compatible = "amlogic,s7-pll-clkc";
+ reg = <0x0 0x8000 0x0 0x1e8>;
+ #clock-cells = <1>;
+ clocks = <&scmi_clk CLKID_TOP_PLL_OSC>,
+ <&scmi_clk CLKID_TOP_PLL_OSC>,
+ <&scmi_clk CLKID_TOP_PLL_OSC>,
+ <&scmi_clk CLKID_TOP_PLL_OSC>,
+ <&scmi_clk CLKID_HDMI_PLL_OSC>;
+ clock-names = "fix",
+ "gp0",
+ "hifi",
+ "hifi1",
+ "hdmi";
+ };
+
uart_b: serial@7a000 {
compatible = "amlogic,s7-uart",
"amlogic,meson-s4-uart";
diff --git a/arch/arm64/boot/dts/amlogic/amlogic-s7.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-s7.dtsi
index 5f2a61f42cbd..afc88abea301 100644
--- a/arch/arm64/boot/dts/amlogic/amlogic-s7.dtsi
+++ b/arch/arm64/boot/dts/amlogic/amlogic-s7.dtsi
@@ -162,6 +162,40 @@ apb: bus@fe000000 {
#size-cells = <2>;
ranges = <0x0 0x0 0x0 0xfe000000 0x0 0x480000>;
+ clkc_periphs: clock-controller@0 {
+ compatible = "amlogic,s7-peripherals-clkc";
+ reg = <0x0 0x0 0x0 0x49c>;
+ #clock-cells = <1>;
+ clocks = <&clkc_pll CLKID_FCLK_DIV2>,
+ <&clkc_pll CLKID_FCLK_DIV2P5>,
+ <&clkc_pll CLKID_FCLK_DIV3>,
+ <&clkc_pll CLKID_FCLK_DIV4>,
+ <&clkc_pll CLKID_FCLK_DIV5>,
+ <&clkc_pll CLKID_FCLK_DIV7>,
+ <&clkc_pll CLKID_HIFI_PLL>,
+ <&clkc_pll CLKID_GP0_PLL>,
+ <&clkc_pll CLKID_HIFI1_PLL>,
+ <&scmi_clk CLKID_GP1_PLL>,
+ <&clkc_pll CLKID_HDMI_PLL>,
+ <&clkc_pll CLKID_HDMI_PLL_PIX>,
+ <&xtal>,
+ <&scmi_clk CLKID_ACLKM>;
+ clock-names = "fclk_div2",
+ "fclk_div2p5",
+ "fclk_div3",
+ "fclk_div4",
+ "fclk_div5",
+ "fclk_div7",
+ "hifi_pll",
+ "gp0_pll",
+ "hifi1_pll",
+ "gp1_pll",
+ "hdmi_pll",
+ "vid_pix",
+ "xtal",
+ "axi_frcpu";
+ };
+
clkc_pll: clock-controller@8000 {
compatible = "amlogic,s7-pll-clkc";
reg = <0x0 0x8000 0x0 0x1e8>;
[0] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/arm64/boot/dts/amlogic/amlogic-s7.dtsi
--
Carlo Caione
_______________________________________________
linux-amlogic mailing list
linux-amlogic@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-amlogic
next prev parent reply other threads:[~2026-11-06 22:27 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-06 8:30 [PATCH 0/7] Add Amlogic S7 clock controllers Carlo Caione
2026-11-06 8:30 ` [PATCH 1/7] dt-bindings: clock: Add Amlogic S7 SCMI clock IDs Carlo Caione
2026-11-06 8:30 ` [PATCH 2/7] clk: meson: pll: Support PLLs without a pre-divider Carlo Caione
2026-11-06 8:35 ` sashiko-bot
2026-11-06 8:30 ` [PATCH 3/7] clk: meson: pll: Support active-low resets Carlo Caione
2026-11-06 8:30 ` [PATCH 4/7] dt-bindings: clock: Add Amlogic S7 PLL clock controller Carlo Caione
2026-11-06 17:35 ` Conor Dooley
2026-11-06 8:30 ` [PATCH 5/7] clk: amlogic: Add S7 PLL clock controller driver Carlo Caione
2026-11-06 8:51 ` sashiko-bot
2026-11-06 8:30 ` [PATCH 6/7] dt-bindings: clock: Add Amlogic S7 peripherals clock controller Carlo Caione
2026-11-06 17:34 ` Conor Dooley
2026-11-06 19:34 ` Carlo Caione
2026-11-06 20:48 ` Conor Dooley
2026-11-06 22:27 ` Carlo Caione [this message]
2026-11-06 8:30 ` [PATCH 7/7] clk: amlogic: Add S7 peripherals clock controller driver Carlo Caione
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=au5RoF6BooP14xhY@macbook \
--to=ccaione@baylibre.com \
--cc=bmasney+clk@redhat.com \
--cc=chuan.liu@amlogic.com \
--cc=conor+dt@kernel.org \
--cc=conor@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=jbrunet+clk@baylibre.com \
--cc=jbrunet@baylibre.com \
--cc=jian.hu@amlogic.com \
--cc=khilman@baylibre.com \
--cc=krzk+dt@kernel.org \
--cc=linux-amlogic@lists.infradead.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-clk@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=martin.blumenstingl@googlemail.com \
--cc=neil.armstrong@linaro.org \
--cc=robh@kernel.org \
--cc=sboyd@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®