From: Florian Fainelli <f.fainelli@gmail.com>
To: linux-mips@vger.kernel.org
Cc: macro@orcam.me.uk,
Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
open list <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH] MIPS: SiByte: Add missing sb1_cache_error() prototype
Date: Thu, 12 Nov 2026 11:21:52 -0800 [thread overview]
Message-ID: <01705c8c-2043-40d9-bd4a-446081eac4a5@gmail.com> (raw)
In-Reply-To: <20261110223651.2698860-1-f.fainelli@gmail.com>
On 11/10/26 14:36, Florian Fainelli wrote:
> Fixes the following warning:
>
> arch/mips/mm/cerr-sb1.c:165:17: warning: no previous prototype for ‘sb1_cache_error’ [-Wmissing-prototypes]
> 165 | asmlinkage void sb1_cache_error(void)
> | ^~~~~~~~~~~~~~~
>
> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
There are many more, let me squash them all and resubmit.
--
Florian
prev parent reply other threads:[~2026-11-12 19:21 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-10 22:36 Florian Fainelli
2026-11-12 19:21 ` Florian Fainelli [this message]
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