Re: [RFC] mpam,x86,fs/resctrl: Generic schema description Proof of Concept

["Chen, Yu C" <yu.c.chen@intel.com>]

Hi Reinette,

On 7/15/2026 5:37 AM, Reinette Chatre wrote:
> Hi Chenyu,
> 
> On 6/26/26 8:46 AM, Chen, Yu C wrote:
>> On 6/11/2026 11:45 PM, Reinette Chatre wrote:
>>> On 6/10/26 8:26 PM, Chen, Yu C wrote:
>>>> On 6/10/2026 11:59 PM, Reinette Chatre wrote:
>>>> [ ... ]
>>>>
>>>>>
>>>>> -  This implies that all current and future ERDT capable systems will keep
>>>>>       supporting MSR access with the legacy "percentage based control". Is this
>>>>>       accurate? What will behavior be on an ERDT system that does not support
>>>>>       MSR access with the percentage-based control?
>>>>
>>>> Would it make sense to encourage users to switch to MMIO-based access if the
>>>> platform replaces MSR interfaces with MMIO-based ones? One issue with emulating
>>>> MSR-based access is that there may not be a strict 1:1 mapping between the MSR
>>>> range and the MMIO range. Additionally, I am unsure whether both are strictly
>>>> linearly scalable, so it could be challenging to create a proper mapping for
>>>> msr_value_emulated = map(mmio_value) IIUC.
>>>
>>> resctrl needs to continue to offer the MB percentage based control to not break any
>>> existing tools that may take a while to transition to the new control interface.
>>>
>>> I believe all architectures will encourage their users to use the finer grained
>>> controls while I also expect users and their tools would gradually switch by themselves
>>> to benefit from the improved capabilities.
>>>
>>
>> The following are current thoughts on how Control B can emulate Control A.
>> May I know if this direction is acceptable?
>>
>> The main idea is that, Legacy MBA controller delegates to region-aware MBA
>> controller via a pointer, with its hw_update function converting percentages
>> to the target's value range.
>>
>> struct resctrl_hw_ctrl {
>>      struct resctrl_ctrl  r_ctrl;
>>      unsigned int         msr_base;
>>      void                 (*hw_update)(struct hw_param *m);
>>      /* points to the backing controller */
>>      struct resctrl_ctrl  *r_ctrl_emul;  <-- newly added
>> };
>>
>> On boot, region-aware controllers shall be created first, followed by the
>> legacy MBA controller. When ERDT is enabled for legacy MBA, hw_update is
>> assigned to mba_emul_update() instead of mba_wrmsr_intel(). Meanwhile,
>> r_ctrl_emul points to the MAX controller of region0.
> 
> To maintain the generic "memory bandwidth allocation" I was expecting legacy
> MBA to be emulated by MAX controllers of all regions, not just one. Could you please
> elaborate how emulating with just one region is preferred?
> 

You are right, legacy MBA introduces the request rate controller between 
the core (L2)
and the L3,  so it controls traffic to both DRAM, CXL,etc. Let me think 
about
how to use a linked list for this emulation.

thanks,
Chenyu