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From: Babu Moger <babu.moger@amd.com>
To: Reinette Chatre <reinette.chatre@intel.com>,
	"Moger, Babu" <bmoger@amd.com>, Tony Luck <tony.luck@intel.com>,
	Ben Horgan <ben.horgan@arm.com>,
	James Morse <james.morse@arm.com>,
	Dave Martin <Dave.Martin@arm.com>,
	Drew Fustini <fustini@kernel.org>,
	Fenghua Yu <fenghuay@nvidia.com>, Chen Yu <yu.c.chen@intel.com>
Cc: Borislav Petkov <bp@alien8.de>,
	Thomas Gleixner <tglx@linutronix.de>,
	Dave Hansen <dave.hansen@linux.intel.com>,
	Peter Newman <peternewman@google.com>,
	"x86@kernel.org" <x86@kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [RFC] mpam,x86,fs/resctrl: Generic schema description Proof of Concept
Date: Wed, 3 Jun 2026 09:40:46 -0500	[thread overview]
Message-ID: <802f5b4b-be71-4805-8a7f-fcd5fbb70d70@amd.com> (raw)
In-Reply-To: <6fc01c5a-aeee-41ea-ad02-67747ae80d03@intel.com>

Hi Reinette,

On 6/2/26 22:55, Reinette Chatre wrote:
> Hi Babu,
> 
> On 6/2/26 6:14 PM, Moger, Babu wrote:
>> Hi Reinette,
>>
>> On 6/2/2026 5:56 PM, Reinette Chatre wrote:
>>> Hi Babu,
>>>
>>> On 6/2/26 1:23 PM, Babu Moger wrote:
>>>> Hi Reinette,
>>>>
>>>> For some reason, I couldn’t find your patch on lore.kernel.org:
>>>> https://lore.kernel.org/lkml/?q=Reinette+Chatre
>>>
>>> How about:
>>> https://lore.kernel.org/lkml/aab804b9-e8b5-40ad-a85b-af7033391243@intel.com/
>>
>> Yes. It works. But, I used to find patches using the names. It did not work this time.
> 
> Interesting. When I run your lore query the first email from this thread is among the
> results.
> 
>>
>>>
>>>>
>>>> I eventually located it here:
>>>> https://sashiko.dev/#/message/aab804b9-e8b5-40ad-a85b-af7033391243%40intel.com
>>>>
>>>> Thanks for sharing the patches. I’m still reviewing them.
>>>>
>>>> I was able to build and boot the kernel and can see the MIN and MAX controls. After moving your test code to __rdt_get_mem_config_amd().
>>>
>>> Thank you very much for trying it out.
>>>
>>>> On 5/29/26 13:06, Reinette Chatre wrote:
>>>
>>> ...
>>>
>>>>> Primary resctrl fs data structure changes
>>>>> =========================================
>>>>>
>>>>> Introduces a control represented by struct resctrl_ctrl that looks as below. To make
>>>>> the changes easier to follow I kept some of the original names to help communicate
>>>>> where familiar data structures land.
>>>>>
>>>>> What to notice about a control is that it has some common properties required
>>>>> from all controls (scope, type, etc.) and then depending on the type of control
>>>>> (RESCTRL_CTRL_BITMAP or RESCTRL_CTRL_SCALAR) there are type specific properties.
>>>>>
>>>>> /**
>>>>>     * struct resctrl_ctrl - A resource control
>>>>>     * @entry:    List entry of rdt_resource::controls
>>>>>     * @scope:    Scope of the resource that this control allocates
>>>>>     * @domains:    RCU list of all control domains
>>>>>     * @type:    The control type that determines the properties of the control,
>>>>>     *        format string for displaying control values to user space, and
>>>>>     *        parser of control values provided by user space.
>>>>>     * @name:    Name of the control. Appended to final resource name
>>>>>     *        (rdt_resource_final::name) to create final schema entry.
>>>>>     *        Specifically, "rdt_resource_final::name"_"resctrl_ctrl::name".
>>>>>     *        For example, with resource name "MB" and control name "MAX" the
>>>>>     *        schema entry will be "MB_MAX".
>>>>>     * @cache:    Cache allocation control properties.
>>>>>     * @membw:    Bandwidth control properties.
>>>>>     */
>>>>> struct resctrl_ctrl {
>>>>>       struct list_head    entry;
>>>>>       enum resctrl_scope    scope;
>>>>>       struct list_head    domains;
>>>>>       enum resctrl_ctrl_type    type;
>>>>>       enum resctrl_ctrl_name    name;
>>>>>       union {
>>>>>           struct resctrl_cache    cache;
>>>>>           struct resctrl_membw    membw;
>>>>>       };
>>>>> };
>>>>>
>>>>> Two members summarize how this new structure fits into the rest of resctrl:
>>>>> a) resctrl_ctrl::entry
>>>>>       Since a resource can support multiple controls there is a new list
>>>>>       in struct rdt_resource named "controls" that contains the list of all
>>>>>       controls supported by the resource.
>>>>> b) resctrl_ctrl::domains
>>>>>       Instead of the list of control domains belonging to a resource they
>>>>>       now belong to the control self. By doing so resctrl can support resource
>>>>>       controls at different scope for the same resource. This is intended to
>>>>>       support some upcoming MPAM and RISC-V usages.
>>>>>       
>>>>
>>>> I like the idea of supporting multiple controls for each resource.
>>>>
>>>> With these patches, now we have one list containing all the controls.
>>>>
>>>> However, in case of RDT_RESOURCE_L3, we have two lists "mon_domains" and "controls". mon_domains list deals with monitoring and control deals with control parts(multiple).
>>>>
>>>> Have you thought about making the list("control") generic so that the control can be monitoring also. It will just one list containing multiple controls or monitor.
>>>
>>> The control list adds an additional layer of abstraction just for control management,
>>> independent from monitoring. The mon_domains list is unchanged while each control now
>>> has its own ctrl_domains list.
>>>
>>> Here is an attempt to visualize how a resource with two monitoring domains, and two controls,
>>> each with two control domains end up being managed:
>>>
>>> +-------------------------+
>>> | struct rdt_resource     |
>>> +-------------------------+
>>> | ...                     |
>>> | controls (list_head)    |---------+
>>> | mon_domains (list_head) |---+     |
>>> | ...                     |   |     |
>>> +-------------------------+   |     |
>>>                                 |     |
>>>     +---------------------------+     |
>>>     |                                 |
>>>     v                                 v
>>> +-----------------------------+   +-------------------------+
>>> | struct rdt_l3_mon_domain #1 |   | struct resctrl_ctrl #A  |
>>> +-----------------------------+   +-------------------------+
>>> | rdt_domain_hdr              |-+ | entry (list_head)       |       +----------------------------+
>>> | ...                         | | | domains (list_head)     |------>| struct rdt_ctrl_domain #A1 |
>>> +-----------------------------+ | | ...                     |       +----------------------------+
>>>                                   | +-------------------------+       | rdt_domain_hdr             |---+
>>>     +-----------------------------+   |                               | ...                        |   |
>>>     | (next)                          | (next)                        +----------------------------+   |
>>>     v                                 v                                                                |
>>> +-----------------------------+   +-------------------------+       +----------------------------+<--+
>>> | struct rdt_l3_mon_domain #2 |   | struct resctrl_ctrl #B  |       | struct rdt_ctrl_domain #A2 |
>>> +-----------------------------+   +-------------------------+       +----------------------------+
>>> | rdt_domain_hdr              |   | entry (list_head)       |       | rdt_domain_hdr             |
>>> | ...                         |   | domains (list_head)     |----n  | ...                        |
>>> +-----------------------------+   | ...                     |    |  +----------------------------+
>>>                                     +-------------------------+    |
>>>                                                                    |
>>>                                       +----------------------------+
>>>                                       |
>>>                                       v
>>>                                     +----------------------------+
>>>                                     | struct rdt_ctrl_domain #B1 |
>>>                                     +----------------------------+
>>>                                     | rdt_domain_hdr             |---+
>>>                                     | ...                        |   |
>>>                                     +----------------------------+   |
>>>                                                                      |
>>>                                     +----------------------------+<--+
>>>                                     | struct rdt_ctrl_domain #B2 |
>>>                                     +----------------------------+
>>>                                     | rdt_domain_hdr             |
>>>                                     | ...                        |
>>>                                     +----------------------------+
>>>
>>> resctrl used to manage single domains that are capable of both monitoring and control
>>> but this was split to support scenario where monitoring and control of a resource are
>>> done at different scope. See
>>> cd84f72b6a5c ("x86/resctrl: Prepare for different scope for control/monitor operations")
>>>
>>> This feature further expands the difference between monitoring and control since now there
>>> can be multiple instances of a control domain (one per control) associated with a resource
>>> while monitoring still just supports one monitoring domain per resource.
>>>
>>> I thus cannot see how this can be accomplished with a single list. Could you sketch out
>>> what you have in mind?
>>>
>>
>> Thanks for the sketch. It makes it much more clear.
>>
>> mon_domains directly maintains a list of monitoring domains, whereas controls maintains a list of control objects, each of which owns its own domain list.
>>
>> I was thinking, one possibility would be to make mon_domains follow a structure similar to controls, allowing both to be represented through a common top-level list.
>>
>> However, the resulting abstraction may become fairly large and complex, with limited overlap between the monitoring and control data structures.
>>
> 
> I am trying to envision this but it sounds to be as though each control has its own monitoring
> which is not clear to me. resctrl ultimately needs to support hardware features. Could you please
> share more about the hardware feature(s) this design intends to support?
> 

This is mostly my thinking. There is no new hardware feature that 
required this change. We can safely ignore this idea.

Thanks
Babu

  reply	other threads:[~2026-06-03 14:40 UTC|newest]

Thread overview: 84+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-05-29 18:06 Reinette Chatre
2026-06-02 20:23 ` Babu Moger
2026-06-02 22:56   ` Reinette Chatre
2026-06-03  1:14     ` Moger, Babu
2026-06-03  3:55       ` Reinette Chatre
2026-06-03 14:40         ` Babu Moger [this message]
2026-06-02 23:32 ` Chen, Yu C
2026-06-03  3:45   ` Reinette Chatre
2026-06-03 11:53     ` Chen, Yu C
2026-06-04 16:37       ` Reinette Chatre
2026-06-05 15:43         ` Chen, Yu C
2026-06-05 16:20           ` Reinette Chatre
2026-06-03 15:15 ` Ben Horgan
2026-06-03 19:34   ` Drew Fustini
2026-06-04 11:24     ` Ben Horgan
2026-06-04 17:38       ` Drew Fustini
2026-06-12  1:30         ` Shaopeng Tan (Fujitsu)
2026-06-17 15:29           ` Reinette Chatre
2026-06-19  1:42             ` Shaopeng Tan (Fujitsu)
2026-06-22 16:10               ` Reinette Chatre
2026-06-23  5:04                 ` Shaopeng Tan (Fujitsu)
2026-06-04 21:05     ` Reinette Chatre
2026-06-05 19:35       ` Drew Fustini
2026-06-06  5:10         ` Drew Fustini
2026-06-06  5:23           ` Drew Fustini
2026-06-04 17:43   ` Reinette Chatre
2026-06-05 14:53     ` Ben Horgan
2026-06-05 15:39       ` Reinette Chatre
2026-06-05 16:37         ` Ben Horgan
2026-06-08 16:16           ` Reinette Chatre
2026-06-09 10:10             ` Ben Horgan
2026-06-09 15:28               ` Reinette Chatre
2026-06-09 16:37                 ` Ben Horgan
2026-06-09 17:41                   ` Reinette Chatre
2026-06-10  7:09                     ` Chen, Yu C
2026-06-10 14:27                       ` Chen, Yu C
2026-06-10 16:13                         ` Reinette Chatre
2026-06-10 17:57                           ` Chen, Yu C
2026-06-10 18:10                             ` Reinette Chatre
2026-06-10 15:59                       ` Reinette Chatre
2026-06-10 18:05                         ` Chen, Yu C
2026-06-11  3:26                         ` Chen, Yu C
2026-06-11 15:45                           ` Reinette Chatre
2026-06-26 15:46                             ` Chen, Yu C
2026-07-02 14:27                               ` Ben Horgan
2026-07-03  9:01                                 ` Chen, Yu C
2026-07-14 21:37                               ` Reinette Chatre
2026-07-15  2:49                                 ` Chen, Yu C
2026-06-10  4:31                 ` Drew Fustini
2026-06-10 15:14                   ` Reinette Chatre
2026-06-03 18:46 ` Luck, Tony
2026-06-04 10:02   ` Ben Horgan
2026-06-04 21:42   ` Reinette Chatre
2026-07-08 12:56     ` Chen, Yu C
2026-07-14 21:39       ` Reinette Chatre
2026-06-03 22:14 ` Drew Fustini
2026-06-04 21:47   ` Reinette Chatre
2026-06-05 19:48     ` Drew Fustini
2026-06-15 21:05 ` Moger, Babu
2026-06-17 17:18   ` Reinette Chatre
2026-06-17 20:29     ` Babu Moger
2026-06-24 19:08 ` Fenghua Yu
2026-06-24 22:22   ` Reinette Chatre
2026-06-25  1:26     ` Fenghua Yu
2026-06-25 15:43       ` Reinette Chatre
2026-07-10 20:59         ` Fenghua Yu
2026-07-14 22:06           ` Reinette Chatre
2026-07-15  8:34             ` Ben Horgan
2026-07-15 15:41               ` Reinette Chatre
2026-07-16 14:59                 ` Ben Horgan
2026-07-16 16:02                   ` Luck, Tony
2026-07-16 16:22                     ` Ben Horgan
2026-07-16 17:50                       ` Reinette Chatre
2026-07-17 10:27                         ` Ben Horgan
2026-07-16 16:04                   ` Reinette Chatre
2026-07-16 16:44                     ` Ben Horgan
2026-07-16 17:07                       ` Reinette Chatre
2026-07-17 12:20                         ` Ben Horgan
2026-07-17 16:00                           ` Reinette Chatre
2026-07-17 16:02                     ` Chen, Yu C
2026-07-17 16:55                       ` Reinette Chatre
2026-07-02 13:37       ` Ben Horgan
2026-07-02 15:16         ` Fenghua Yu
2026-07-03 13:42           ` Ben Horgan

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