From: Manikanta Mylavarapu <quic_mmanikan@quicinc.com>
To: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>,
<andersson@kernel.org>, <mturquette@baylibre.com>,
<sboyd@kernel.org>, <robh@kernel.org>, <krzk+dt@kernel.org>,
<conor+dt@kernel.org>, <konradybcio@kernel.org>,
<catalin.marinas@arm.com>, <will@kernel.org>,
<p.zabel@pengutronix.de>, <richardcochran@gmail.com>,
<geert+renesas@glider.be>, <dmitry.baryshkov@linaro.org>,
<arnd@arndb.de>, <nfraprado@collabora.com>,
<quic_tdas@quicinc.com>, <biju.das.jz@bp.renesas.com>,
<elinor.montmasson@savoirfairelinux.com>, <ross.burton@arm.com>,
<javier.carrasco@wolfvision.net>, <quic_anusha@quicinc.com>,
<linux-arm-msm@vger.kernel.org>, <linux-clk@vger.kernel.org>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>, <netdev@vger.kernel.org>
Cc: <quic_srichara@quicinc.com>, <quic_varada@quicinc.com>
Subject: Re: [PATCH v10 3/6] dt-bindings: clock: Add ipq9574 NSSCC clock and reset definitions
Date: Mon, 24 Feb 2025 15:24:10 +0530 [thread overview]
Message-ID: <03157f06-8e80-470c-bdee-ffbb31627a9c@quicinc.com> (raw)
In-Reply-To: <8936f8a7-5bc0-417b-a719-806f1ce0904b@oss.qualcomm.com>
On 2/21/2025 5:19 PM, Konrad Dybcio wrote:
> On 21.02.2025 11:14 AM, Manikanta Mylavarapu wrote:
>> From: Devi Priya <quic_devipriy@quicinc.com>
>>
>> Add NSSCC clock and reset definitions for ipq9574.
>>
>> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
>> Signed-off-by: Devi Priya <quic_devipriy@quicinc.com>
>> Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com>
>> ---
>
> [...]
>
>> + - |
>> + #include <dt-bindings/clock/qcom,ipq9574-gcc.h>
>> + #include <dt-bindings/clock/qcom,ipq-cmn-pll.h>
>> + clock-controller@39b00000 {
>> + compatible = "qcom,ipq9574-nsscc";
>> + reg = <0x39b00000 0x80000>;
>> + clocks = <&xo_board_clk>,
>> + <&cmn_pll NSS_1200MHZ_CLK>,
>> + <&cmn_pll PPE_353MHZ_CLK>,
>> + <&gcc GPLL0_OUT_AUX>,
>> + <&uniphy 0>,
>> + <&uniphy 1>,
>> + <&uniphy 2>,
>> + <&uniphy 3>,
>> + <&uniphy 4>,
>> + <&uniphy 5>,
>> + <&gcc GCC_NSSCC_CLK>;
>> + clock-names = "xo",
>> + "nss_1200",
>> + "ppe_353",
>> + "gpll0_out",
>> + "uniphy0_rx",
>> + "uniphy0_tx",
>> + "uniphy1_rx",
>> + "uniphy1_tx",
>> + "uniphy2_rx",
>> + "uniphy2_tx",
>> + "nsscc";
>
> I see that the input clock is named rather non-descriptively, but maybe
> we should call it something like "bus" so that it has more meaning to
> the reader
Hi Konrad,
Thank you for reviewing the patch.
I will rename the 'nsscc' clock to 'bus' in the next version.
Thanks & Regards,
Manikanta.
next prev parent reply other threads:[~2025-02-24 9:54 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-21 10:14 [PATCH v10 0/6] Add NSS clock controller support for IPQ9574 Manikanta Mylavarapu
2025-02-21 10:14 ` [PATCH v10 1/6] dt-bindings: clock: gcc-ipq9574: Add definition for GPLL0_OUT_AUX Manikanta Mylavarapu
2025-02-21 10:14 ` [PATCH v10 2/6] clk: qcom: gcc-ipq9574: Add support for gpll0_out_aux clock Manikanta Mylavarapu
2025-02-21 10:14 ` [PATCH v10 3/6] dt-bindings: clock: Add ipq9574 NSSCC clock and reset definitions Manikanta Mylavarapu
2025-02-21 11:49 ` Konrad Dybcio
2025-02-24 9:54 ` Manikanta Mylavarapu [this message]
2025-02-21 10:14 ` [PATCH v10 4/6] clk: qcom: Add NSS clock Controller driver for IPQ9574 Manikanta Mylavarapu
2025-02-21 11:49 ` Konrad Dybcio
2025-02-24 9:55 ` Manikanta Mylavarapu
2025-02-21 10:14 ` [PATCH v10 5/6] arm64: dts: qcom: ipq9574: Add nsscc node Manikanta Mylavarapu
2025-02-21 10:14 ` [PATCH v10 6/6] arm64: defconfig: Build NSS Clock Controller driver for IPQ9574 Manikanta Mylavarapu
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