mirror of https://lore.kernel.org/lkml/
 help / color / mirror / Atom feed
From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
To: Manikanta Mylavarapu <quic_mmanikan@quicinc.com>,
	andersson@kernel.org, mturquette@baylibre.com, sboyd@kernel.org,
	robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org,
	konradybcio@kernel.org, catalin.marinas@arm.com, will@kernel.org,
	p.zabel@pengutronix.de, richardcochran@gmail.com,
	geert+renesas@glider.be, dmitry.baryshkov@linaro.org,
	arnd@arndb.de, nfraprado@collabora.com, quic_tdas@quicinc.com,
	biju.das.jz@bp.renesas.com,
	elinor.montmasson@savoirfairelinux.com, ross.burton@arm.com,
	javier.carrasco@wolfvision.net, quic_anusha@quicinc.com,
	linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, netdev@vger.kernel.org
Cc: quic_srichara@quicinc.com, quic_varada@quicinc.com
Subject: Re: [PATCH v10 3/6] dt-bindings: clock: Add ipq9574 NSSCC clock and reset definitions
Date: Fri, 21 Feb 2025 12:49:21 +0100	[thread overview]
Message-ID: <8936f8a7-5bc0-417b-a719-806f1ce0904b@oss.qualcomm.com> (raw)
In-Reply-To: <20250221101426.776377-4-quic_mmanikan@quicinc.com>

On 21.02.2025 11:14 AM, Manikanta Mylavarapu wrote:
> From: Devi Priya <quic_devipriy@quicinc.com>
> 
> Add NSSCC clock and reset definitions for ipq9574.
> 
> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> Signed-off-by: Devi Priya <quic_devipriy@quicinc.com>
> Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com>
> ---

[...]

> +  - |
> +    #include <dt-bindings/clock/qcom,ipq9574-gcc.h>
> +    #include <dt-bindings/clock/qcom,ipq-cmn-pll.h>
> +    clock-controller@39b00000 {
> +      compatible = "qcom,ipq9574-nsscc";
> +      reg = <0x39b00000 0x80000>;
> +      clocks = <&xo_board_clk>,
> +               <&cmn_pll NSS_1200MHZ_CLK>,
> +               <&cmn_pll PPE_353MHZ_CLK>,
> +               <&gcc GPLL0_OUT_AUX>,
> +               <&uniphy 0>,
> +               <&uniphy 1>,
> +               <&uniphy 2>,
> +               <&uniphy 3>,
> +               <&uniphy 4>,
> +               <&uniphy 5>,
> +               <&gcc GCC_NSSCC_CLK>;
> +      clock-names = "xo",
> +                    "nss_1200",
> +                    "ppe_353",
> +                    "gpll0_out",
> +                    "uniphy0_rx",
> +                    "uniphy0_tx",
> +                    "uniphy1_rx",
> +                    "uniphy1_tx",
> +                    "uniphy2_rx",
> +                    "uniphy2_tx",
> +                    "nsscc";

I see that the input clock is named rather non-descriptively, but maybe
we should call it something like "bus" so that it has more meaning to
the reader

Konrad

  reply	other threads:[~2025-02-21 11:49 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-02-21 10:14 [PATCH v10 0/6] Add NSS clock controller support for IPQ9574 Manikanta Mylavarapu
2025-02-21 10:14 ` [PATCH v10 1/6] dt-bindings: clock: gcc-ipq9574: Add definition for GPLL0_OUT_AUX Manikanta Mylavarapu
2025-02-21 10:14 ` [PATCH v10 2/6] clk: qcom: gcc-ipq9574: Add support for gpll0_out_aux clock Manikanta Mylavarapu
2025-02-21 10:14 ` [PATCH v10 3/6] dt-bindings: clock: Add ipq9574 NSSCC clock and reset definitions Manikanta Mylavarapu
2025-02-21 11:49   ` Konrad Dybcio [this message]
2025-02-24  9:54     ` Manikanta Mylavarapu
2025-02-21 10:14 ` [PATCH v10 4/6] clk: qcom: Add NSS clock Controller driver for IPQ9574 Manikanta Mylavarapu
2025-02-21 11:49   ` Konrad Dybcio
2025-02-24  9:55     ` Manikanta Mylavarapu
2025-02-21 10:14 ` [PATCH v10 5/6] arm64: dts: qcom: ipq9574: Add nsscc node Manikanta Mylavarapu
2025-02-21 10:14 ` [PATCH v10 6/6] arm64: defconfig: Build NSS Clock Controller driver for IPQ9574 Manikanta Mylavarapu

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=8936f8a7-5bc0-417b-a719-806f1ce0904b@oss.qualcomm.com \
    --to=konrad.dybcio@oss.qualcomm.com \
    --cc=andersson@kernel.org \
    --cc=arnd@arndb.de \
    --cc=biju.das.jz@bp.renesas.com \
    --cc=catalin.marinas@arm.com \
    --cc=conor+dt@kernel.org \
    --cc=devicetree@vger.kernel.org \
    --cc=dmitry.baryshkov@linaro.org \
    --cc=elinor.montmasson@savoirfairelinux.com \
    --cc=geert+renesas@glider.be \
    --cc=javier.carrasco@wolfvision.net \
    --cc=konradybcio@kernel.org \
    --cc=krzk+dt@kernel.org \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-arm-msm@vger.kernel.org \
    --cc=linux-clk@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=mturquette@baylibre.com \
    --cc=netdev@vger.kernel.org \
    --cc=nfraprado@collabora.com \
    --cc=p.zabel@pengutronix.de \
    --cc=quic_anusha@quicinc.com \
    --cc=quic_mmanikan@quicinc.com \
    --cc=quic_srichara@quicinc.com \
    --cc=quic_tdas@quicinc.com \
    --cc=quic_varada@quicinc.com \
    --cc=richardcochran@gmail.com \
    --cc=robh@kernel.org \
    --cc=ross.burton@arm.com \
    --cc=sboyd@kernel.org \
    --cc=will@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox

all inboxes | Powered by JetHome®