From: Lizhi Hou <lizhi.hou@amd.com>
To: David Zhang <yidong.zhang@amd.com>, <quic_jhugo@quicinc.com>,
<karol.wachowski@linux.intel.com>, <max.zhen@amd.com>,
<ogabbay@kernel.org>, <dri-devel@lists.freedesktop.org>,
<linux-kernel@vger.kernel.org>
Cc: <sonal.santan@amd.com>, <mario.limonciello@amd.com>
Subject: Re: [PATCH V4 17/19] accel/amdxdna: Enable AIE4 firmware logging to DRAM
Date: Wed, 14 Oct 2026 11:24:37 -0700 [thread overview]
Message-ID: <058e556d-0dfb-1654-9905-c59279b8c3cb@amd.com> (raw)
In-Reply-To: <20261009225343.3079074-18-yidong.zhang@amd.com>
On 10/9/26 15:53, David Zhang wrote:
> Allocate a DRAM buffer for firmware logging, and also set the log level
> to less verbose. This will give the best performance numbers.
>
> Signed-off-by: David Zhang <yidong.zhang@amd.com>
> ---
> drivers/accel/amdxdna/aie4_message.c | 20 ++++++++++
> drivers/accel/amdxdna/aie4_msg_priv.h | 24 ++++++++++++
> drivers/accel/amdxdna/aie4_pci.c | 53 +++++++++++++++++++++++++++
> drivers/accel/amdxdna/aie4_pci.h | 5 +++
> 4 files changed, 102 insertions(+)
>
> diff --git a/drivers/accel/amdxdna/aie4_message.c b/drivers/accel/amdxdna/aie4_message.c
> index 2820cfb6f9ed..96ccc28e5360 100644
> --- a/drivers/accel/amdxdna/aie4_message.c
> +++ b/drivers/accel/amdxdna/aie4_message.c
> @@ -247,6 +247,26 @@ int aie4_attach_work_buffer(struct amdxdna_dev_hdl *ndev)
> return ret;
> }
>
> +int aie4_start_fw_log(struct amdxdna_dev_hdl *ndev, u32 level)
> +{
> + DECLARE_AIE_MSG(aie4_msg_start_fw_log, AIE4_MSG_OP_START_FW_LOG);
> + struct amdxdna_dev *xdna = ndev->aie.xdna;
> + int ret;
> +
> + req.buff_addr = ndev->fw_log_buf_addr;
> + req.buff_size = ndev->fw_log_buf_size;
> + req.log_level = level;
> +
> + ret = aie_send_mgmt_msg_wait(&ndev->aie, &msg);
> + if (ret)
> + XDNA_WARN(xdna, "Failed to start fw log, ret %d", ret);
> + else
> + XDNA_DBG(xdna, "Started fw log, level %u size 0x%x",
> + level, ndev->fw_log_buf_size);
> +
> + return ret;
> +}
> +
> int aie4_msg_set_power_mode(struct amdxdna_dev_hdl *ndev, u8 power_mode)
> {
> DECLARE_AIE_MSG(aie4_msg_power_override, AIE4_MSG_OP_POWER_OVERRIDE);
> diff --git a/drivers/accel/amdxdna/aie4_msg_priv.h b/drivers/accel/amdxdna/aie4_msg_priv.h
> index 636bf8d04c76..566f6abc9e2d 100644
> --- a/drivers/accel/amdxdna/aie4_msg_priv.h
> +++ b/drivers/accel/amdxdna/aie4_msg_priv.h
> @@ -29,6 +29,7 @@ enum aie4_msg_opcode {
> AIE4_MSG_OP_GET_CURRENT_DPM_LEVEL = 0x30013,
>
> AIE4_MSG_OP_ATTACH_WORK_BUFFER = 0x40001,
> + AIE4_MSG_OP_START_FW_LOG = 0x40003,
> };
>
> enum aie4_msg_status {
> @@ -263,4 +264,27 @@ struct aie4_msg_attach_work_buffer_resp {
> enum aie4_msg_status status;
> } __packed;
>
> +/* Dynamic firmware log levels. */
> +enum aie4_fw_log_level {
> + AIE4_FW_LOG_LEVEL_OFF,
> + AIE4_FW_LOG_LEVEL_ERR,
> + AIE4_FW_LOG_LEVEL_WRN,
> + AIE4_FW_LOG_LEVEL_INF,
> + AIE4_FW_LOG_LEVEL_DBG,
> + AIE4_FW_LOG_LEVEL_MAX,
> +};
> +
> +#define AIE4_FW_LOG_BUF_SIZE SZ_1M
> +
> +struct aie4_msg_start_fw_log_req {
> + __u64 buff_addr;
> + __u32 buff_size;
> + __u32 log_level;
> + __u32 reserved;
> +} __packed;
> +
> +struct aie4_msg_start_fw_log_resp {
> + enum aie4_msg_status status;
> +} __packed;
> +
> #endif /* _AIE4_MSG_PRIV_H_ */
> diff --git a/drivers/accel/amdxdna/aie4_pci.c b/drivers/accel/amdxdna/aie4_pci.c
> index 7f4238f76bc2..e09d24d85cdf 100644
> --- a/drivers/accel/amdxdna/aie4_pci.c
> +++ b/drivers/accel/amdxdna/aie4_pci.c
> @@ -383,6 +383,16 @@ static int aie4_config_fw(struct amdxdna_dev_hdl *ndev)
> if (ret == -ETIME)
> return ret;
>
> + /*
> + * Give the firmware high performance DRAM to log into with less
> + * verbose level.
> + */
> + if (ndev->fw_log_buf) {
> + ret = aie4_start_fw_log(ndev, AIE4_FW_LOG_LEVEL_ERR);
> + if (ret == -ETIME)
> + return ret;
> + }
> +
> return 0;
> }
>
> @@ -941,6 +951,41 @@ static void aie4_free_work_buffer(struct amdxdna_dev_hdl *ndev)
> ndev->work_buf = NULL;
> }
>
> +/*
> + * Firmware logging is best effort: a device that cannot spare the buffer still
> + * runs, it just does not log. Never fail hw start or probe on this.
> + */
> +static void aie4_alloc_fw_log_buffer(struct amdxdna_dev_hdl *ndev)
> +{
> + struct amdxdna_dev *xdna = ndev->aie.xdna;
> + u32 buf_size = AIE4_FW_LOG_BUF_SIZE;
> +
> + ndev->fw_log_buf = amdxdna_alloc_msg_buffer(xdna, &buf_size,
> + &ndev->fw_log_buf_addr);
> + if (IS_ERR(ndev->fw_log_buf)) {
> + XDNA_WARN(xdna, "Failed to alloc fw log buffer, size 0x%x",
> + AIE4_FW_LOG_BUF_SIZE);
> + ndev->fw_log_buf = NULL;
> + return;
> + }
> +
> + ndev->fw_log_buf_size = buf_size;
> + XDNA_DBG(xdna, "FW log buffer allocated: size 0x%x", buf_size);
> +}
> +
> +/* Free logging buffer after firmware execution has stopped. */
> +static void aie4_free_fw_log_buffer(struct amdxdna_dev_hdl *ndev)
> +{
> + struct amdxdna_dev *xdna = ndev->aie.xdna;
> +
> + if (!ndev->fw_log_buf)
> + return;
> +
> + amdxdna_free_msg_buffer(xdna, ndev->fw_log_buf_size, ndev->fw_log_buf,
> + ndev->fw_log_buf_addr);
> + ndev->fw_log_buf = NULL;
> +}
> +
> static int aie4_pf_init(struct amdxdna_dev *xdna)
> {
> int ret;
> @@ -953,6 +998,8 @@ static int aie4_pf_init(struct amdxdna_dev *xdna)
> if (ret)
> return ret;
>
> + aie4_alloc_fw_log_buffer(xdna->dev_handle);
> +
> ret = aie4_pf_hw_start(xdna->dev_handle);
> if (ret)
> goto free_work_buf;
> @@ -960,6 +1007,7 @@ static int aie4_pf_init(struct amdxdna_dev *xdna)
> return 0;
>
> free_work_buf:
> + aie4_free_fw_log_buffer(xdna->dev_handle);
> aie4_free_work_buffer(xdna->dev_handle);
> return ret;
> }
> @@ -987,6 +1035,8 @@ static int aie4_classic_init(struct amdxdna_dev *xdna)
> if (ret)
> return ret;
>
> + aie4_alloc_fw_log_buffer(xdna->dev_handle);
> +
> ret = aie4_classic_hw_start(xdna->dev_handle);
> if (ret)
> goto free_work_buf;
> @@ -994,6 +1044,7 @@ static int aie4_classic_init(struct amdxdna_dev *xdna)
> return 0;
>
> free_work_buf:
> + aie4_free_fw_log_buffer(xdna->dev_handle);
> aie4_free_work_buffer(xdna->dev_handle);
> return ret;
> }
> @@ -1002,6 +1053,7 @@ static void aie4_pf_fini(struct amdxdna_dev *xdna)
> {
> aie4_sriov_stop(xdna->dev_handle);
> aie4_pf_hw_stop(xdna->dev_handle);
> + aie4_free_fw_log_buffer(xdna->dev_handle);
> aie4_free_work_buffer(xdna->dev_handle);
> }
>
> @@ -1013,6 +1065,7 @@ static void aie4_vf_fini(struct amdxdna_dev *xdna)
> static void aie4_classic_fini(struct amdxdna_dev *xdna)
> {
> aie4_classic_hw_stop(xdna->dev_handle);
> + aie4_free_fw_log_buffer(xdna->dev_handle);
> aie4_free_work_buffer(xdna->dev_handle);
> }
>
> diff --git a/drivers/accel/amdxdna/aie4_pci.h b/drivers/accel/amdxdna/aie4_pci.h
> index da5aa57bc43f..4b7367af7cf1 100644
> --- a/drivers/accel/amdxdna/aie4_pci.h
> +++ b/drivers/accel/amdxdna/aie4_pci.h
> @@ -105,6 +105,10 @@ struct amdxdna_dev_hdl {
> dma_addr_t work_buf_addr;
> u32 work_buf_size;
>
> + void *fw_log_buf;
> + dma_addr_t fw_log_buf_addr;
> + u32 fw_log_buf_size;
> +
> u8 pw_mode;
>
> /* Context switch hysteresis timeout in microseconds. */
> @@ -125,6 +129,7 @@ int aie4_query_aie_version(struct amdxdna_dev_hdl *ndev,
> struct amdxdna_drm_query_aie_version *version);
> int aie4_suspend_fw(struct amdxdna_dev_hdl *ndev);
> int aie4_attach_work_buffer(struct amdxdna_dev_hdl *ndev);
> +int aie4_start_fw_log(struct amdxdna_dev_hdl *ndev, u32 level);
Reviewed-by: Lizhi Hou <lizhi.hou@amd.com>
> int aie4_query_npu_firmware_version(struct amdxdna_dev_hdl *ndev,
> struct amdxdna_drm_query_firmware_version *fw_version);
> int aie4_query_cert_firmware_version(struct amdxdna_dev_hdl *ndev,
next prev parent reply other threads:[~2026-10-14 18:24 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-09 22:53 [PATCH V4 00/19] accel/amdxdna: Kernel submission and PM for AIE4 David Zhang
2026-10-09 22:53 ` [PATCH V4 01/19] accel/amdxdna: Rename NPU3 firmware files David Zhang
2026-10-09 22:53 ` [PATCH V4 02/19] accel/amdxdna: Remove mmap for doorbell David Zhang
2026-10-12 20:37 ` Lizhi Hou
2026-10-09 22:53 ` [PATCH V4 03/19] accel/amdxdna: Add CERT firmware version support David Zhang
2026-10-12 20:39 ` Lizhi Hou
2026-10-09 22:53 ` [PATCH V4 04/19] accel/amdxdna: Support firmware 6.0 David Zhang
2026-10-12 20:41 ` Lizhi Hou
2026-10-09 22:53 ` [PATCH V4 05/19] accel/amdxdna: Add NPU3 classic device support David Zhang
2026-10-12 20:41 ` Lizhi Hou
2026-10-09 22:53 ` [PATCH V4 06/19] accel/amdxdna: Add AIE version query to aie4_get_info David Zhang
2026-10-12 20:55 ` Lizhi Hou
2026-10-09 22:53 ` [PATCH V4 07/19] accel/amdxdna: Add get and set power_mode for AIE4 David Zhang
2026-10-12 21:29 ` Lizhi Hou
2026-10-09 22:53 ` [PATCH V4 08/19] accel/amdxdna: Add clock, DPM frequency, and resource info queries " David Zhang
2026-10-12 22:58 ` Lizhi Hou
2026-10-09 22:53 ` [PATCH V4 09/19] accel/amdxdna: Add context switch hysteresis with debugfs control David Zhang
2026-10-13 18:29 ` Lizhi Hou
2026-10-09 22:53 ` [PATCH V4 10/19] accel/amdxdna: Refactor AIE4 hardware initialization sequence David Zhang
2026-10-13 18:33 ` Lizhi Hou
2026-10-09 22:53 ` [PATCH V4 11/19] accel/amdxdna: Decouple AIE4 doorbell and MSI-X notify transport hooks David Zhang
2026-10-13 18:38 ` Lizhi Hou
2026-10-09 22:53 ` [PATCH V4 12/19] accel/amdxdna: Implement AIE4 kernel queue lifecycle and memory layout David Zhang
2026-10-13 18:41 ` Lizhi Hou
2026-10-09 22:53 ` [PATCH V4 13/19] accel/amdxdna: Prepare for AIE4 command submission David Zhang
2026-10-13 18:42 ` Lizhi Hou
2026-10-09 22:53 ` [PATCH V4 14/19] accel/amdxdna: Move HMM invalidate wait into common GEM code David Zhang
2026-10-13 18:45 ` Lizhi Hou
2026-10-09 22:53 ` [PATCH V4 15/19] accel/amdxdna: Make populate_range common for AIE2 and AIE4 David Zhang
2026-10-14 18:10 ` Lizhi Hou
2026-10-09 22:53 ` [PATCH V4 16/19] accel/amdxdna: Implement AIE4 command packet building and submission David Zhang
2026-10-14 18:15 ` Lizhi Hou
2026-10-09 22:53 ` [PATCH V4 17/19] accel/amdxdna: Enable AIE4 firmware logging to DRAM David Zhang
2026-10-14 18:24 ` Lizhi Hou [this message]
2026-10-09 22:53 ` [PATCH V4 18/19] accel/amdxdna: Implement AIE4 suspend and resume David Zhang
2026-10-14 18:28 ` Lizhi Hou
2026-10-09 22:53 ` [PATCH V4 19/19] accel/amdxdna: Implement runtime suspend and resume support David Zhang
2026-10-14 18:36 ` Lizhi Hou
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