From: Lizhi Hou <lizhi.hou@amd.com>
To: David Zhang <yidong.zhang@amd.com>, <quic_jhugo@quicinc.com>,
<karol.wachowski@linux.intel.com>, <max.zhen@amd.com>,
<ogabbay@kernel.org>, <dri-devel@lists.freedesktop.org>,
<linux-kernel@vger.kernel.org>
Cc: <sonal.santan@amd.com>, <mario.limonciello@amd.com>,
Wendy Liang <wendy.liang@amd.com>
Subject: Re: [PATCH V4 11/19] accel/amdxdna: Decouple AIE4 doorbell and MSI-X notify transport hooks
Date: Tue, 13 Oct 2026 11:38:23 -0700 [thread overview]
Message-ID: <380059c1-de81-5b0d-7a63-1ce455edc956@amd.com> (raw)
In-Reply-To: <20261009225343.3079074-12-yidong.zhang@amd.com>
On 10/9/26 15:53, David Zhang wrote:
> Separate PCI-specific doorbell and interrupt notification handling from
> the transport-neutral context code.
>
> The new transport functions are wired in later patches in this series.
> Doorbell ringing is not invoked until full context setup and BAR
> validation are done, so no NULL dereference or BAR boundary bypass can
> occur.
>
> Co-developed-by: Wendy Liang <wendy.liang@amd.com>
> Signed-off-by: Wendy Liang <wendy.liang@amd.com>
> Signed-off-by: David Zhang <yidong.zhang@amd.com>
> ---
> drivers/accel/amdxdna/aie4_ctx.c | 38 ++++++-----------
> drivers/accel/amdxdna/aie4_pci.c | 66 +++++++++++++++++++++++++++++
> drivers/accel/amdxdna/aie4_pci.h | 14 ++++++
> drivers/accel/amdxdna/amdxdna_ctx.h | 2 +
> 4 files changed, 96 insertions(+), 24 deletions(-)
>
> diff --git a/drivers/accel/amdxdna/aie4_ctx.c b/drivers/accel/amdxdna/aie4_ctx.c
> index 5eb918e1d58c..20b725de6ab7 100644
> --- a/drivers/accel/amdxdna/aie4_ctx.c
> +++ b/drivers/accel/amdxdna/aie4_ctx.c
> @@ -22,63 +22,52 @@
> #include "amdxdna_mailbox_helper.h"
> #include "amdxdna_pci_drv.h"
>
> -static irqreturn_t cert_comp_isr(int irq, void *p)
> -{
> - struct cert_comp *cert_comp = p;
> -
> - wake_up_all(&cert_comp->waitq);
> - return IRQ_HANDLED;
> -}
> -
> static struct cert_comp *aie4_lookup_cert_comp(struct amdxdna_dev_hdl *ndev, u32 msix_idx)
> {
> struct amdxdna_dev *xdna = ndev->aie.xdna;
> - struct pci_dev *pdev = to_pci_dev(xdna->ddev.dev);
> struct cert_comp *cert_comp;
> int ret;
>
> - guard(mutex)(&ndev->cert_comp_lock);
> -
> + mutex_lock(&ndev->cert_comp_lock);
> cert_comp = xa_load(&ndev->cert_comp_xa, msix_idx);
> if (cert_comp) {
> kref_get(&cert_comp->kref);
> + mutex_unlock(&ndev->cert_comp_lock);
> return cert_comp;
> }
>
> cert_comp = kzalloc_obj(*cert_comp);
> if (!cert_comp)
> - return NULL;
> + goto unlock;
>
> cert_comp->ndev = ndev;
> cert_comp->msix_idx = msix_idx;
> + cert_comp->irq = -ENOENT;
> init_waitqueue_head(&cert_comp->waitq);
> kref_init(&cert_comp->kref);
>
> - ret = pci_irq_vector(pdev, cert_comp->msix_idx);
> - if (ret < 0) {
> - XDNA_ERR(xdna, "MSI-X idx %u is invalid, ret:%d", msix_idx, ret);
> - goto free_cert_comp;
> - }
> - cert_comp->irq = ret;
> -
> - ret = request_irq(cert_comp->irq, cert_comp_isr, 0, "xdna_hsa", cert_comp);
> + /* Transport-specific: PCI wires an MSI-X irq, platform an IPI callback. */
> + ret = aie4_request_notification(cert_comp);
> if (ret) {
> - XDNA_ERR(xdna, "request irq %d failed %d", cert_comp->irq, ret);
> + XDNA_ERR(xdna, "request notification for msix idx %u failed %d", msix_idx, ret);
> goto free_cert_comp;
> }
>
> ret = xa_err(xa_store(&ndev->cert_comp_xa, msix_idx, cert_comp, GFP_KERNEL));
> if (ret) {
> - XDNA_ERR(xdna, "store cert_comp for msix idx %d failed %d", msix_idx, ret);
> + XDNA_ERR(xdna, "store cert_comp for msix idx %u failed %d", msix_idx, ret);
> goto free_irq;
> }
> + mutex_unlock(&ndev->cert_comp_lock);
>
> return cert_comp;
>
> free_irq:
> - free_irq(cert_comp->irq, cert_comp);
> + aie4_free_notification(cert_comp);
> free_cert_comp:
> kfree(cert_comp);
> +unlock:
> + mutex_unlock(&ndev->cert_comp_lock);
> return NULL;
> }
>
> @@ -90,7 +79,7 @@ static void cert_comp_release(struct kref *kref)
> drm_WARN_ON(&ndev->aie.xdna->ddev, !mutex_is_locked(&ndev->cert_comp_lock));
>
> xa_erase(&ndev->cert_comp_xa, cert_comp->msix_idx);
> - free_irq(cert_comp->irq, cert_comp);
> + aie4_free_notification(cert_comp);
> kfree(cert_comp);
> }
>
> @@ -100,6 +89,7 @@ static void aie4_put_cert_comp(struct cert_comp *cert_comp)
>
> ndev = cert_comp->ndev;
> guard(mutex)(&ndev->cert_comp_lock);
> +
> kref_put(&cert_comp->kref, cert_comp_release);
> }
>
> diff --git a/drivers/accel/amdxdna/aie4_pci.c b/drivers/accel/amdxdna/aie4_pci.c
> index ffe78c0c4e8b..93594211c169 100644
> --- a/drivers/accel/amdxdna/aie4_pci.c
> +++ b/drivers/accel/amdxdna/aie4_pci.c
> @@ -14,6 +14,7 @@
>
> #include "aie.h"
> #include "aie4_msg_priv.h"
> +#include "amdxdna_ctx.h"
Dictionary order please.
Reviewed-by: Lizhi Hou <lizhi.hou@amd.com>
> #include "aie4_pci.h"
> #include "amdxdna_error.h"
> #include "amdxdna_mailbox.h"
> @@ -112,6 +113,69 @@ static void aie4_mailbox_fini(struct amdxdna_dev_hdl *ndev)
> ndev->mbox = NULL;
> }
>
> +static irqreturn_t cert_comp_isr(int irq, void *p)
> +{
> + struct cert_comp *cert_comp = p;
> +
> + wake_up_all(&cert_comp->waitq);
> + return IRQ_HANDLED;
> +}
> +
> +/* Wire per-cert completion notification interrupt. */
> +int aie4_request_notification(struct cert_comp *comp)
> +{
> + struct pci_dev *pdev = to_pci_dev(comp->ndev->aie.xdna->ddev.dev);
> + int ret;
> +
> + ret = pci_irq_vector(pdev, comp->msix_idx);
> + if (ret < 0)
> + return ret;
> + comp->irq = ret;
> +
> + ret = request_irq(comp->irq, cert_comp_isr, 0, "xdna_hsa", comp);
> + if (ret) {
> + comp->irq = -ENOENT;
> + return ret;
> + }
> +
> + return 0;
> +}
> +
> +/* Tear down per-cert completion notification interrupt. */
> +void aie4_free_notification(struct cert_comp *comp)
> +{
> + if (comp->irq >= 0)
> + free_irq(comp->irq, comp);
> +}
> +
> +/* Validate and configure hardware context doorbell target. */
> +int aie4_doorbell_setup(struct amdxdna_hwctx *hwctx,
> + const struct aie4_msg_create_hw_context_resp *resp)
> +{
> + struct amdxdna_dev *xdna = hwctx->client->xdna;
> + struct amdxdna_dev_hdl *ndev = xdna->dev_handle;
> + struct amdxdna_hwctx_priv *priv = hwctx->priv;
> + struct pci_dev *pdev = to_pci_dev(xdna->ddev.dev);
> + u64 db_off = (u64)ndev->priv->doorbell_off + resp->doorbell_offset;
> +
> + /* Validate doorbell offset against mapped BAR bounds. */
> + if (db_off + sizeof(u32) >
> + pci_resource_len(pdev, xdna->dev_info->doorbell_bar)) {
> + XDNA_ERR(xdna, "doorbell offset 0x%llx out of BAR", db_off);
> + return -EINVAL;
> + }
> +
> + priv->doorbell_addr = ndev->doorbell_base + ndev->priv->doorbell_off +
> + resp->doorbell_offset;
> + return 0;
> +}
> +
> +/* Ring context doorbell to notify CERT. */
> +void aie4_doorbell_ring(struct amdxdna_hwctx *hwctx)
> +{
> + writel(0, hwctx->priv->doorbell_addr);
> +}
> +
> static int aie4_irq_init(struct amdxdna_dev *xdna)
> {
> struct pci_dev *pdev = to_pci_dev(xdna->ddev.dev);
> @@ -630,6 +694,7 @@ static int aie4m_pcidev_init(struct amdxdna_dev *xdna)
> set_bit(SMU_REG_BAR(ndev, i), &bars);
> set_bit(xdna->dev_info->mbox_bar, &bars);
> set_bit(xdna->dev_info->sram_bar, &bars);
> + set_bit(xdna->dev_info->doorbell_bar, &bars);
>
> for (i = 0; i < PCI_NUM_RESOURCES; i++) {
> if (!test_bit(i, &bars))
> @@ -643,6 +708,7 @@ static int aie4m_pcidev_init(struct amdxdna_dev *xdna)
>
> ndev->mbox_base = tbl[xdna->dev_info->mbox_bar];
> ndev->rbuf_base = tbl[xdna->dev_info->sram_bar];
> + ndev->doorbell_base = tbl[xdna->dev_info->doorbell_bar];
>
> pci_set_master(pdev);
>
> diff --git a/drivers/accel/amdxdna/aie4_pci.h b/drivers/accel/amdxdna/aie4_pci.h
> index 959ef3695813..9fcdfcc5a15f 100644
> --- a/drivers/accel/amdxdna/aie4_pci.h
> +++ b/drivers/accel/amdxdna/aie4_pci.h
> @@ -32,6 +32,8 @@ struct amdxdna_hwctx_priv {
>
> struct cert_comp *cert_comp;
> u32 hw_ctx_id;
> +
> + void __iomem *doorbell_addr;
> };
>
> struct amdxdna_dev_priv {
> @@ -54,6 +56,7 @@ struct amdxdna_dev_hdl {
> const struct amdxdna_dev_priv *priv;
> void __iomem *mbox_base;
> void __iomem *rbuf_base;
> + void __iomem *doorbell_base;
>
> struct mailbox *mbox;
> u32 partition_id;
> @@ -111,6 +114,17 @@ int aie4_cmd_wait(struct amdxdna_hwctx *hwctx, u64 seq, u32 timeout);
> /* aie4_pci.c */
> int aie4_restore_power_mode(struct amdxdna_dev_hdl *ndev);
>
> +/*
> + * Transport hooks implemented by PCI backend. Doorbell hooks are wired during
> + * kernel queue creation and command submission in later patches in the series.
> + */
> +struct aie4_msg_create_hw_context_resp;
> +int aie4_doorbell_setup(struct amdxdna_hwctx *hwctx,
> + const struct aie4_msg_create_hw_context_resp *resp);
> +void aie4_doorbell_ring(struct amdxdna_hwctx *hwctx);
> +int aie4_request_notification(struct cert_comp *comp);
> +void aie4_free_notification(struct cert_comp *comp);
> +
> /* aie4_sriov.c */
> #if IS_ENABLED(CONFIG_PCI_IOV)
> int aie4_sriov_configure(struct amdxdna_dev *xdna, int num_vfs);
> diff --git a/drivers/accel/amdxdna/amdxdna_ctx.h b/drivers/accel/amdxdna/amdxdna_ctx.h
> index 6e78bab8a02c..9bbc3db4ebde 100644
> --- a/drivers/accel/amdxdna/amdxdna_ctx.h
> +++ b/drivers/accel/amdxdna/amdxdna_ctx.h
> @@ -6,6 +6,8 @@
> #ifndef _AMDXDNA_CTX_H_
> #define _AMDXDNA_CTX_H_
>
> +#include <drm/amdxdna_accel.h>
> +#include <drm/gpu_scheduler.h>
> #include <linux/bitfield.h>
>
> #include "amdxdna_gem.h"
next prev parent reply other threads:[~2026-10-13 18:38 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-09 22:53 [PATCH V4 00/19] accel/amdxdna: Kernel submission and PM for AIE4 David Zhang
2026-10-09 22:53 ` [PATCH V4 01/19] accel/amdxdna: Rename NPU3 firmware files David Zhang
2026-10-09 22:53 ` [PATCH V4 02/19] accel/amdxdna: Remove mmap for doorbell David Zhang
2026-10-12 20:37 ` Lizhi Hou
2026-10-09 22:53 ` [PATCH V4 03/19] accel/amdxdna: Add CERT firmware version support David Zhang
2026-10-12 20:39 ` Lizhi Hou
2026-10-09 22:53 ` [PATCH V4 04/19] accel/amdxdna: Support firmware 6.0 David Zhang
2026-10-12 20:41 ` Lizhi Hou
2026-10-09 22:53 ` [PATCH V4 05/19] accel/amdxdna: Add NPU3 classic device support David Zhang
2026-10-12 20:41 ` Lizhi Hou
2026-10-09 22:53 ` [PATCH V4 06/19] accel/amdxdna: Add AIE version query to aie4_get_info David Zhang
2026-10-12 20:55 ` Lizhi Hou
2026-10-09 22:53 ` [PATCH V4 07/19] accel/amdxdna: Add get and set power_mode for AIE4 David Zhang
2026-10-12 21:29 ` Lizhi Hou
2026-10-09 22:53 ` [PATCH V4 08/19] accel/amdxdna: Add clock, DPM frequency, and resource info queries " David Zhang
2026-10-12 22:58 ` Lizhi Hou
2026-10-09 22:53 ` [PATCH V4 09/19] accel/amdxdna: Add context switch hysteresis with debugfs control David Zhang
2026-10-13 18:29 ` Lizhi Hou
2026-10-09 22:53 ` [PATCH V4 10/19] accel/amdxdna: Refactor AIE4 hardware initialization sequence David Zhang
2026-10-13 18:33 ` Lizhi Hou
2026-10-09 22:53 ` [PATCH V4 11/19] accel/amdxdna: Decouple AIE4 doorbell and MSI-X notify transport hooks David Zhang
2026-10-13 18:38 ` Lizhi Hou [this message]
2026-10-09 22:53 ` [PATCH V4 12/19] accel/amdxdna: Implement AIE4 kernel queue lifecycle and memory layout David Zhang
2026-10-13 18:41 ` Lizhi Hou
2026-10-09 22:53 ` [PATCH V4 13/19] accel/amdxdna: Prepare for AIE4 command submission David Zhang
2026-10-13 18:42 ` Lizhi Hou
2026-10-09 22:53 ` [PATCH V4 14/19] accel/amdxdna: Move HMM invalidate wait into common GEM code David Zhang
2026-10-13 18:45 ` Lizhi Hou
2026-10-09 22:53 ` [PATCH V4 15/19] accel/amdxdna: Make populate_range common for AIE2 and AIE4 David Zhang
2026-10-14 18:10 ` Lizhi Hou
2026-10-09 22:53 ` [PATCH V4 16/19] accel/amdxdna: Implement AIE4 command packet building and submission David Zhang
2026-10-14 18:15 ` Lizhi Hou
2026-10-09 22:53 ` [PATCH V4 17/19] accel/amdxdna: Enable AIE4 firmware logging to DRAM David Zhang
2026-10-14 18:24 ` Lizhi Hou
2026-10-09 22:53 ` [PATCH V4 18/19] accel/amdxdna: Implement AIE4 suspend and resume David Zhang
2026-10-14 18:28 ` Lizhi Hou
2026-10-09 22:53 ` [PATCH V4 19/19] accel/amdxdna: Implement runtime suspend and resume support David Zhang
2026-10-14 18:36 ` Lizhi Hou
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=380059c1-de81-5b0d-7a63-1ce455edc956@amd.com \
--to=lizhi.hou@amd.com \
--cc=dri-devel@lists.freedesktop.org \
--cc=karol.wachowski@linux.intel.com \
--cc=linux-kernel@vger.kernel.org \
--cc=mario.limonciello@amd.com \
--cc=max.zhen@amd.com \
--cc=ogabbay@kernel.org \
--cc=quic_jhugo@quicinc.com \
--cc=sonal.santan@amd.com \
--cc=wendy.liang@amd.com \
--cc=yidong.zhang@amd.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®