[PATCH 0/3] Add Mali-G31 GPU to Amlogic Meson-S4

[PATCH 0/3] Add Mali-G31 GPU to Amlogic Meson-S4

[Martin Blumenstingl]

This series add support for the Mali-G31 GPU on Amlogic Meson-S4 SoCs.
Overall it's similar to Mali-G31 on G12A:
- both are using two reset lines
- both share the same OPP table
- both require the same power override quirk

The main difference is that Meson-S4 gained a second (bus) clock.

This series updates the bifrost dt-bindings for the GPU on the Meson-S4
SoC, wires up the quirk in the panfrost driver and shows how to wire up
the GPU in meson-s4.dtsi.

The .dtsi patch needs to go through the linux-amlogic tree. Would the
dt-bindings patch go along with it (to prevent binding validation
errors)? If so then only the panfrost patch would go through the
panfrost (drm/misc) tree.


Best regards,
Martin


Martin Blumenstingl (3):
  dt-bindings: gpu: mali-bifrost: Add compatible for Amlogic Meson S4
  drm/panfrost: Add Amlogic Meson S4 integration quirk
  arm64: dts: amlogic: S4: Add the Mali-G31 GPU

 .../bindings/gpu/arm,mali-bifrost.yaml        | 20 ++++++++
 arch/arm64/boot/dts/amlogic/meson-s4.dtsi     | 49 +++++++++++++++++++
 drivers/gpu/drm/panfrost/panfrost_drv.c       |  2 +
 3 files changed, 71 insertions(+)

-- 
2.52.0

[PATCH 1/3] dt-bindings: gpu: mali-bifrost: Add compatible for Amlogic Meson S4

[Martin Blumenstingl]

Add a compatible string for the Mali-G31 GPU in the Amlogic Meson S4
SoC. It has two clock inputs (GPU clock and a bus clock) as well as two
resets (main GPU reset line and a GPU ABP reset line).

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
---
 .../bindings/gpu/arm,mali-bifrost.yaml        | 20 +++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml
index db49b8ff8c74..85fae7753004 100644
--- a/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml
+++ b/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml
@@ -19,6 +19,7 @@ properties:
           - enum:
               - allwinner,sun50i-h616-mali
               - amlogic,meson-g12a-mali
+              - amlogic,meson-s4-mali
               - mediatek,mt8183-mali
               - mediatek,mt8183b-mali
               - mediatek,mt8186-mali
@@ -143,6 +144,25 @@ allOf:
         power-domain-names: false
       required:
         - resets
+  - if:
+      properties:
+        compatible:
+          contains:
+            const: amlogic,meson-s4-mali
+    then:
+      properties:
+        power-domains:
+          maxItems: 1
+        power-domain-names: false
+        clocks:
+          minItems: 2
+        clock-names:
+          items:
+            - const: gpu
+            - const: bus
+      required:
+        - resets
+        - clock-names
   - if:
       properties:
         compatible:
-- 
2.52.0

Re: [PATCH 1/3] dt-bindings: gpu: mali-bifrost: Add compatible for Amlogic Meson S4

[Krzysztof Kozlowski]

On Sat, Jan 10, 2026 at 09:04:24PM +0100, Martin Blumenstingl wrote:
> Add a compatible string for the Mali-G31 GPU in the Amlogic Meson S4
> SoC. It has two clock inputs (GPU clock and a bus clock) as well as two
> resets (main GPU reset line and a GPU ABP reset line).
> 
> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
> ---
>  .../bindings/gpu/arm,mali-bifrost.yaml        | 20 +++++++++++++++++++
>  1 file changed, 20 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml
> index db49b8ff8c74..85fae7753004 100644
> --- a/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml
> +++ b/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml
> @@ -19,6 +19,7 @@ properties:
>            - enum:
>                - allwinner,sun50i-h616-mali
>                - amlogic,meson-g12a-mali
> +              - amlogic,meson-s4-mali
>                - mediatek,mt8183-mali
>                - mediatek,mt8183b-mali
>                - mediatek,mt8186-mali
> @@ -143,6 +144,25 @@ allOf:
>          power-domain-names: false
>        required:
>          - resets
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            const: amlogic,meson-s4-mali
> +    then:
> +      properties:
> +        power-domains:
> +          maxItems: 1
> +        power-domain-names: false
> +        clocks:
> +          minItems: 2

missing maxItems

Can't this be combined with existing meson entry, *after* fixing it to
include missing clocks?


Best regards,
Krzysztof

Re: [PATCH 1/3] dt-bindings: gpu: mali-bifrost: Add compatible for Amlogic Meson S4

[Martin Blumenstingl]

Hi Krzysztof,

On Mon, Jan 12, 2026 at 10:31 AM Krzysztof Kozlowski <krzk@kernel.org> wrote:
>
> On Sat, Jan 10, 2026 at 09:04:24PM +0100, Martin Blumenstingl wrote:
> > Add a compatible string for the Mali-G31 GPU in the Amlogic Meson S4
> > SoC. It has two clock inputs (GPU clock and a bus clock) as well as two
> > resets (main GPU reset line and a GPU ABP reset line).
> >
> > Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
> > ---
> >  .../bindings/gpu/arm,mali-bifrost.yaml        | 20 +++++++++++++++++++
> >  1 file changed, 20 insertions(+)
> >
> > diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml
> > index db49b8ff8c74..85fae7753004 100644
> > --- a/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml
> > +++ b/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml
> > @@ -19,6 +19,7 @@ properties:
> >            - enum:
> >                - allwinner,sun50i-h616-mali
> >                - amlogic,meson-g12a-mali
> > +              - amlogic,meson-s4-mali
> >                - mediatek,mt8183-mali
> >                - mediatek,mt8183b-mali
> >                - mediatek,mt8186-mali
> > @@ -143,6 +144,25 @@ allOf:
> >          power-domain-names: false
> >        required:
> >          - resets
> > +  - if:
> > +      properties:
> > +        compatible:
> > +          contains:
> > +            const: amlogic,meson-s4-mali
> > +    then:
> > +      properties:
> > +        power-domains:
> > +          maxItems: 1
> > +        power-domain-names: false
> > +        clocks:
> > +          minItems: 2
>
> missing maxItems
Thanks, I'll add it!

> Can't this be combined with existing meson entry, *after* fixing it to
> include missing clocks?
I don't think so: G12A (and earlier SoCs) have the Mali registers
"somewhere", while on S4 Mali is on the APB4 bus.
Even if they are on a bus on G12A: then there's no clock linked with
that bus (at least nothing I'm aware of).
This is why I even introduced a new section in the bindings.


Best regards,
Martin

[PATCH 2/3] drm/panfrost: Add Amlogic Meson S4 integration quirk

[Martin Blumenstingl]

The Mali G31-GPU on Amlogic Meson S4 SoCs requires the same quirk as
previous SoC generations. Wire up that quirk by matching the Meson S4
compatible string with the existing Amlogic SoC data.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
---
 drivers/gpu/drm/panfrost/panfrost_drv.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/gpu/drm/panfrost/panfrost_drv.c b/drivers/gpu/drm/panfrost/panfrost_drv.c
index 7d8c7c337606..431470af0f36 100644
--- a/drivers/gpu/drm/panfrost/panfrost_drv.c
+++ b/drivers/gpu/drm/panfrost/panfrost_drv.c
@@ -1056,6 +1056,8 @@ static const struct of_device_id dt_match[] = {
 	  .data = &amlogic_data, },
 	{ .compatible = "amlogic,meson-g12a-mali",
 	  .data = &amlogic_data, },
+	{ .compatible = "amlogic,meson-s4-mali",
+	  .data = &amlogic_data, },
 	{ .compatible = "arm,mali-t604", .data = &default_data, },
 	{ .compatible = "arm,mali-t624", .data = &default_data, },
 	{ .compatible = "arm,mali-t628", .data = &default_data, },
-- 
2.52.0

Re: [PATCH 2/3] drm/panfrost: Add Amlogic Meson S4 integration quirk

[Steven Price]

On 10/01/2026 20:04, Martin Blumenstingl wrote:
> The Mali G31-GPU on Amlogic Meson S4 SoCs requires the same quirk as
> previous SoC generations. Wire up that quirk by matching the Meson S4
> compatible string with the existing Amlogic SoC data.
> 
> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>

Reviewed-by: Steven Price <steven.price@arm.com>

> ---
>  drivers/gpu/drm/panfrost/panfrost_drv.c | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/drivers/gpu/drm/panfrost/panfrost_drv.c b/drivers/gpu/drm/panfrost/panfrost_drv.c
> index 7d8c7c337606..431470af0f36 100644
> --- a/drivers/gpu/drm/panfrost/panfrost_drv.c
> +++ b/drivers/gpu/drm/panfrost/panfrost_drv.c
> @@ -1056,6 +1056,8 @@ static const struct of_device_id dt_match[] = {
>  	  .data = &amlogic_data, },
>  	{ .compatible = "amlogic,meson-g12a-mali",
>  	  .data = &amlogic_data, },
> +	{ .compatible = "amlogic,meson-s4-mali",
> +	  .data = &amlogic_data, },
>  	{ .compatible = "arm,mali-t604", .data = &default_data, },
>  	{ .compatible = "arm,mali-t624", .data = &default_data, },
>  	{ .compatible = "arm,mali-t628", .data = &default_data, },

[PATCH 3/3] arm64: dts: amlogic: S4: Add the Mali-G31 GPU

[Martin Blumenstingl]

The vendor BSP indicates that the Mali-G31 GPU on Meson S4 SoCs is
similar to the setup on G12A SoCs. The OPP table and resets are the
same, but the clocks (G12A only has one, S4 has two) and interrupt
numbers are different.

Describe the Mali-G31 GPU with it's resources and enable it by default
since all frequencies are using the same voltage (as the GPU is supplied
by VDDEE changes to the VDDEE voltage are not needed at runtime).

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
---
 arch/arm64/boot/dts/amlogic/meson-s4.dtsi | 49 +++++++++++++++++++++++
 1 file changed, 49 insertions(+)

diff --git a/arch/arm64/boot/dts/amlogic/meson-s4.dtsi b/arch/arm64/boot/dts/amlogic/meson-s4.dtsi
index 9d99ed2994df..efd3dda7d2c1 100644
--- a/arch/arm64/boot/dts/amlogic/meson-s4.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-s4.dtsi
@@ -66,6 +66,39 @@ xtal: xtal-clk {
 		#clock-cells = <0>;
 	};
 
+	gpu_opp_table: opp-table-gpu {
+		compatible = "operating-points-v2";
+
+		opp-124999998 {
+			opp-hz = /bits/ 64 <124999998>;
+			opp-microvolt = <800000>;
+		};
+		opp-249999996 {
+			opp-hz = /bits/ 64 <249999996>;
+			opp-microvolt = <800000>;
+		};
+		opp-285714281 {
+			opp-hz = /bits/ 64 <285714281>;
+			opp-microvolt = <800000>;
+		};
+		opp-399999994 {
+			opp-hz = /bits/ 64 <399999994>;
+			opp-microvolt = <800000>;
+		};
+		opp-499999992 {
+			opp-hz = /bits/ 64 <499999992>;
+			opp-microvolt = <800000>;
+		};
+		opp-666666656 {
+			opp-hz = /bits/ 64 <666666656>;
+			opp-microvolt = <800000>;
+		};
+		opp-799999988 {
+			opp-hz = /bits/ 64 <799999988>;
+			opp-microvolt = <800000>;
+		};
+	};
+
 	firmware {
 		sm: secure-monitor {
 			compatible = "amlogic,meson-gxbb-sm";
@@ -783,6 +816,22 @@ ir: ir@84040 {
 				status = "disabled";
 			};
 
+			gpu: gpu@400000 {
+				compatible = "amlogic,meson-s4-mali", "arm,mali-bifrost";
+				reg = <0x00 0xfe400000 0x00 0x40000>;
+				interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>,
+					     <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>,
+					     <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
+				interrupt-names = "job", "mmu", "gpu";
+				clocks = <&clkc_periphs CLKID_MALI_SEL>,
+					 <&clkc_periphs CLKID_MALI>;
+				clock-names = "gpu", "bus";
+				resets = <&reset RESET_MALI>,
+					 <&reset RESET_MALI_APB>;
+				operating-points-v2 = <&gpu_opp_table>;
+				#cooling-cells = <2>;
+			};
+
 			hwrng: rng@440788 {
 				compatible = "amlogic,meson-s4-rng";
 				reg = <0x0 0x440788 0x0 0x0c>;
-- 
2.52.0