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From: "Satya Priya Kakitapalli (Temp)" <quic_skakitap@quicinc.com>
To: Bryan O'Donoghue <bryan.odonoghue@linaro.org>,
	Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Cc: Bjorn Andersson <andersson@kernel.org>,
	Konrad Dybcio <konrad.dybcio@linaro.org>,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>,
	Abhishek Sahu <absahu@codeaurora.org>,
	"Rob Herring" <robh@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Stephen Boyd <sboyd@codeaurora.org>,
	<linux-arm-msm@vger.kernel.org>, <linux-clk@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>,
	Ajit Pandey <quic_ajipan@quicinc.com>,
	"Imran Shaik" <quic_imrashai@quicinc.com>,
	Taniya Das <quic_tdas@quicinc.com>,
	Jagadeesh Kona <quic_jkona@quicinc.com>
Subject: Re: [PATCH v2 5/6] clk: qcom: Add camera clock controller driver for SM8150
Date: Wed, 17 Jul 2024 11:54:33 +0530	[thread overview]
Message-ID: <0b84b689-8ab8-bcdf-f058-da2ead73786c@quicinc.com> (raw)
In-Reply-To: <503c8ba7-585d-4222-8e81-7f4c52f5f513@linaro.org>


On 7/15/2024 8:31 PM, Bryan O'Donoghue wrote:
> On 15/07/2024 11:38, Dmitry Baryshkov wrote:
>>>> Does it apply to SM8150? For example, on SM8250 RCG2s are not parked.
>>>
>>> Yes, it applies to SM8150.
>> Should the same logic be applied to other chipsets supported upstream?
>> If this is the case, which chipsets?
>
> If you are representing the "top" GDSC inside of the CCF instead of 
> doing this
>
> +    /* Keep the critical clock always-on */
> +    qcom_branch_set_clk_en(regmap, 0xc1e4); /* cam_cc_gdsc_clk */
>
> then the clock should be parked else you'll find the GDSC doesn't come 
> out of reset.
>
> and... as I look at it now we have a logical conflict in 
> drivers/clk/qcom/camcc-sc8280xp.c
>
> static struct clk_branch camcc_gdsc_clk = {
>         .halt_reg = 0xc1e4,
>         .halt_check = BRANCH_HALT,
>         .clkr = {
>                 .enable_reg = 0xc1e4,
>                 .enable_mask = BIT(0),
>                 .hw.init = &(struct clk_init_data){
>                         .name = "camcc_gdsc_clk",
>                         .parent_hws = (const struct clk_hw*[]){
>                                 &camcc_xo_clk_src.clkr.hw,
>                         },
>                         .num_parents = 1,
>                         .flags = CLK_SET_RATE_PARENT,
>                         .ops = &clk_branch2_ops,
>                 },
>         },
> };
>
> Patch sent.
>
> https://lore.kernel.org/linux-arm-msm/20240715-linux-next-24-07-13-sc8280xp-camcc-fixes-v1-1-fadb5d9445c1@linaro.org/T/#u 
>
>

If the clock is modelled, it can get disabled during the late init call, 
when the CCF disables the unused clocks. But, it is a PoR ON  clock and 
expectation from design team is to keep it always-on for GDSC functionality.

So, we should not model this, instead just keep it always on from probe.


> In the round I think we should avoid these horrific hard-coded 
> always-on writes where possible.
>

We have been suggested to make such clocks always ON from probe on 
previous upstream discussions. This is also recently acknowledged by 
maintainers, please see [1] and [2].


[1] 
https://lore.kernel.org/linux-clk/6286a410-6faa-4996-8a9e-dc334dd9421f@linaro.org/


[2] 
https://lore.kernel.org/linux-clk/664cca91-8615-d3f6-7525-15b9b6725cce@quicinc.com/


> Personally I think parking is better than always-on specifically 
> because you define the clock and "see" it in the clock tree.
>
> ---
> bod

  reply	other threads:[~2024-07-17  6:25 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-07-02 15:50 [PATCH v2 0/6] clk: qcom: sm8150: Add camera clock controller support " Satya Priya Kakitapalli
2024-07-02 15:50 ` [PATCH v2 1/6] clk: qcom: alpha-pll: Fix the pll post div mask and shift Satya Priya Kakitapalli
2024-07-03 10:01   ` Dmitry Baryshkov
2024-07-02 15:50 ` [PATCH v2 2/6] clk: qcom: clk-alpha-pll: Update set_rate for Zonda PLL Satya Priya Kakitapalli
2024-07-03 10:02   ` Dmitry Baryshkov
2024-07-06 13:39   ` Konrad Dybcio
2024-07-09 10:56     ` Satya Priya Kakitapalli (Temp)
2024-07-02 15:50 ` [PATCH v2 3/6] clk: qcom: clk-alpha-pll: Add support for Regera PLL ops Satya Priya Kakitapalli
2024-07-03 10:05   ` Dmitry Baryshkov
2024-07-06 13:45     ` Konrad Dybcio
2024-07-09 10:51     ` Satya Priya Kakitapalli (Temp)
2024-07-26  8:10       ` Satya Priya Kakitapalli (Temp)
2024-07-27 10:57         ` Dmitry Baryshkov
2024-07-02 15:50 ` [PATCH v2 4/6] dt-bindings: clock: qcom: Add SM8150 camera clock controller Satya Priya Kakitapalli
2024-07-03 10:14   ` Dmitry Baryshkov
2024-07-09 10:53     ` Satya Priya Kakitapalli (Temp)
2024-07-02 15:50 ` [PATCH v2 5/6] clk: qcom: Add camera clock controller driver for SM8150 Satya Priya Kakitapalli
2024-07-03 10:20   ` Dmitry Baryshkov
2024-07-09 10:52     ` Satya Priya Kakitapalli (Temp)
2024-07-10 22:10       ` Dmitry Baryshkov
2024-07-11  9:51         ` Bryan O'Donoghue
2024-07-15 10:36           ` Satya Priya Kakitapalli (Temp)
2024-07-17 10:53             ` Bryan O'Donoghue
2024-07-17 11:08               ` Satya Priya Kakitapalli (Temp)
2024-07-15 10:22         ` Satya Priya Kakitapalli (Temp)
2024-07-15 10:38           ` Dmitry Baryshkov
2024-07-15 15:01             ` Bryan O'Donoghue
2024-07-17  6:24               ` Satya Priya Kakitapalli (Temp) [this message]
2024-07-17 11:07                 ` Bryan O'Donoghue
2024-07-26  8:25             ` Satya Priya Kakitapalli (Temp)
2024-07-26 10:43               ` Dmitry Baryshkov
2024-07-02 15:50 ` [PATCH v2 6/6] arm64: dts: qcom: Add camera clock controller for sm8150 Satya Priya Kakitapalli
2024-07-03 10:08 ` [PATCH v2 0/6] clk: qcom: sm8150: Add camera clock controller support for SM8150 Dmitry Baryshkov

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