From: Like Xu <like.xu.linux@gmail.com>
To: Jim Mattson <jmattson@google.com>,
Andi Kleen <ak@linux.intel.com>,
Kim Phillips <kim.phillips@amd.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>,
Sean Christopherson <seanjc@google.com>,
Vitaly Kuznetsov <vkuznets@redhat.com>,
Wanpeng Li <wanpengli@tencent.com>,
Joerg Roedel <joro@8bytes.org>,
kvm@vger.kernel.org, linux-kernel@vger.kernel.org,
Like Xu <likexu@tencent.com>
Subject: Re: [PATCH v2 4/6] KVM: x86/pmu: Add pmc->intr to refactor kvm_perf_overflow{_intr}()
Date: Thu, 9 Dec 2021 16:28:37 +0800 [thread overview]
Message-ID: <0ca44f61-f7f1-0440-e1e1-8d5e8aa9b540@gmail.com> (raw)
In-Reply-To: <CALMp9eRAxBFE5mYw=isUSsMTWZS2VOjqZfgh0r3hFuF+5npCAQ@mail.gmail.com>
On 9/12/2021 12:25 pm, Jim Mattson wrote:
>
> Not your change, but if the event is counting anything based on
> cycles, and the guest TSC is scaled to run at a different rate from
> the host TSC, doesn't the initial value of the underlying hardware
> counter have to be adjusted as well, so that the interrupt arrives
> when the guest's counter overflows rather than when the host's counter
> overflows?
I've thought about this issue too and at least the Intel Specification
did not let me down on this detail:
"The counter changes in the VMX non-root mode will follow
VMM's use of the TSC offset or TSC scaling VMX controls"
Not knowing if AMD or the real world hardware
will live up to this expectation and I'm pessimistic.
cc Andi and Kim.
next prev parent reply other threads:[~2021-12-09 8:28 UTC|newest]
Thread overview: 45+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-11-30 7:42 [PATCH v2 0/6] KVM: x86/pmu: Count two basic events for emulated instructions Like Xu
2021-11-30 7:42 ` [PATCH v2 1/6] KVM: x86/pmu: Setup pmc->eventsel for fixed PMCs Like Xu
2021-12-06 19:57 ` Jim Mattson
2021-12-09 18:49 ` Paolo Bonzini
2021-12-09 18:53 ` Jim Mattson
2021-12-09 18:57 ` Paolo Bonzini
2021-12-10 10:20 ` Like Xu
[not found] ` <CALMp9eTq8H_bJOVKwi_7j3Kum9RvW6o-G3zCLUFco1A1cvNrkQ@mail.gmail.com>
2021-12-07 6:07 ` Like Xu
2021-12-07 17:42 ` Jim Mattson
2021-11-30 7:42 ` [PATCH v2 2/6] KVM: x86/pmu: Refactoring find_arch_event() to pmc_perf_hw_id() Like Xu
2021-12-09 3:52 ` Jim Mattson
2021-12-09 8:11 ` Like Xu
2021-12-09 19:24 ` Paolo Bonzini
2022-02-05 1:55 ` Jim Mattson
2022-02-09 9:00 ` Like Xu
2022-02-09 19:30 ` Jim Mattson
2022-02-10 11:28 ` Like Xu
2022-02-11 9:56 ` Ravi Bangoria
2022-02-11 18:16 ` Jim Mattson
2022-02-14 10:14 ` Ravi Bangoria
2022-02-16 7:44 ` Like Xu
2022-02-16 11:24 ` Ravi Bangoria
2021-11-30 7:42 ` [PATCH v2 3/6] KVM: x86/pmu: Reuse pmc_perf_hw_id() and drop find_fixed_event() Like Xu
2021-12-09 3:58 ` Jim Mattson
2021-11-30 7:42 ` [PATCH v2 4/6] KVM: x86/pmu: Add pmc->intr to refactor kvm_perf_overflow{_intr}() Like Xu
2021-12-09 4:25 ` Jim Mattson
2021-12-09 8:28 ` Like Xu [this message]
2021-12-10 0:54 ` Jim Mattson
2021-12-10 9:35 ` Paolo Bonzini
2021-12-10 10:11 ` Like Xu
2021-12-10 22:55 ` Jim Mattson
2021-12-10 22:59 ` Paolo Bonzini
2021-12-10 23:31 ` Jim Mattson
2021-12-12 4:56 ` Jim Mattson
2021-12-13 6:37 ` Jim Mattson
2021-12-16 9:57 ` Like Xu
2021-12-16 17:52 ` Jim Mattson
2021-11-30 7:42 ` [PATCH v2 5/6] KVM: x86: Update vPMCs when retiring instructions Like Xu
2021-12-09 4:33 ` Jim Mattson
2021-12-09 8:44 ` Like Xu
2021-12-09 9:23 ` Like Xu
2021-11-30 7:42 ` [PATCH v2 6/6] KVM: x86: Update vPMCs when retiring branch instructions Like Xu
2021-12-09 4:40 ` Jim Mattson
2021-12-09 19:30 ` [PATCH v2 0/6] KVM: x86/pmu: Count two basic events for emulated instructions Paolo Bonzini
2021-12-16 10:14 ` Like Xu
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