From: Paolo Bonzini <pbonzini@redhat.com>
To: "Kang, Luwei" <luwei.kang@intel.com>,
"kvm@vger.kernel.org" <kvm@vger.kernel.org>
Cc: "rkrcmar@redhat.com" <rkrcmar@redhat.com>,
"tglx@linutronix.de" <tglx@linutronix.de>,
"mingo@redhat.com" <mingo@redhat.com>,
"hpa@zytor.com" <hpa@zytor.com>,
"x86@kernel.org" <x86@kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
Chao Peng <chao.p.peng@linux.intel.com>
Subject: Re: [PATCH 0/9] Intel Processor Trace virtulization enabling
Date: Mon, 23 Oct 2017 16:40:13 +0200 [thread overview]
Message-ID: <109396fa-8f7c-8f24-e804-2a5b71ef0c64@redhat.com> (raw)
In-Reply-To: <82D7661F83C1A047AF7DC287873BF1E167E20AE9@SHSMSX101.ccr.corp.intel.com>
On 23/10/2017 10:01, Kang, Luwei wrote:
>
>>> So, can we enable it in L1
>>> guest only first? I think it is not worth to disable EPT for L1 to
>>> enable intel PT. what is your opinion?
>> Yes, we can enable it. But since KVM sets IA32_VMX_MISC[14]=0, your patches must forbid enabling processor trace during VMX
>> operation.
>
> L1 hypervisor can't get the capability of " TraceEn can be set in
> VMX operation (IA32_VMX_MISC[bit 14] is 0)" and set it to 0. We need
> to trap whether L1 hypervisor have enable VMXON, and forbid enable PT
> when vmxon. Is that right? Or have something else?
Correct. I don't have the SDM at hand, so I'm not sure what happens if
you do a VMXON while TraceEn is 1. However, that has to be handled as well.
Paolo
next prev parent reply other threads:[~2017-10-23 14:40 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-10-16 12:09 Luwei Kang
2017-10-17 12:13 ` Paolo Bonzini
2017-10-18 10:18 ` Kang, Luwei
2017-10-18 10:30 ` Paolo Bonzini
2017-10-18 11:06 ` Kang, Luwei
2017-10-18 11:22 ` Paolo Bonzini
2017-10-19 5:54 ` Kang, Luwei
2017-10-19 7:14 ` Paolo Bonzini
2017-10-20 0:22 ` Kang, Luwei
2017-10-20 8:58 ` Paolo Bonzini
2017-10-23 8:01 ` Kang, Luwei
2017-10-23 14:40 ` Paolo Bonzini [this message]
2017-10-18 12:53 ` Stefan Hajnoczi
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