From: Joerg Roedel <joerg.roedel@amd.com>
To: iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org
Cc: Joerg Roedel <joerg.roedel@amd.com>
Subject: [PATCH 13/14] x86/amd-iommu: Support higher level PTEs in iommu_page_unmap
Date: Fri, 4 Sep 2009 11:40:51 +0200 [thread overview]
Message-ID: <1252057252-32074-14-git-send-email-joerg.roedel@amd.com> (raw)
In-Reply-To: <1252057252-32074-1-git-send-email-joerg.roedel@amd.com>
This patch changes fetch_pte and iommu_page_unmap to support
different page sizes too.
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
---
arch/x86/include/asm/amd_iommu_types.h | 1 +
arch/x86/kernel/amd_iommu.c | 21 +++++++++++++--------
2 files changed, 14 insertions(+), 8 deletions(-)
diff --git a/arch/x86/include/asm/amd_iommu_types.h b/arch/x86/include/asm/amd_iommu_types.h
index d66430d..351ca39 100644
--- a/arch/x86/include/asm/amd_iommu_types.h
+++ b/arch/x86/include/asm/amd_iommu_types.h
@@ -158,6 +158,7 @@
#define PM_LEVEL_ENC(x) (((x) << 9) & 0xe00ULL)
#define PM_LEVEL_PDE(x, a) ((a) | PM_LEVEL_ENC((x)) | \
IOMMU_PTE_P | IOMMU_PTE_IR | IOMMU_PTE_IW)
+#define PM_PTE_LEVEL(pte) (((pte) >> 9) & 0x7ULL)
#define IOMMU_PTE_P (1ULL << 0)
#define IOMMU_PTE_TV (1ULL << 1)
diff --git a/arch/x86/kernel/amd_iommu.c b/arch/x86/kernel/amd_iommu.c
index addf658..002cf9c 100644
--- a/arch/x86/kernel/amd_iommu.c
+++ b/arch/x86/kernel/amd_iommu.c
@@ -62,7 +62,7 @@ static void dma_ops_reserve_addresses(struct dma_ops_domain *dom,
unsigned long start_page,
unsigned int pages);
static u64 *fetch_pte(struct protection_domain *domain,
- unsigned long address);
+ unsigned long address, int map_size);
static void update_domain(struct protection_domain *domain);
#ifndef BUS_NOTIFY_UNBOUND_DRIVER
@@ -552,9 +552,9 @@ static int iommu_map_page(struct protection_domain *dom,
}
static void iommu_unmap_page(struct protection_domain *dom,
- unsigned long bus_addr)
+ unsigned long bus_addr, int map_size)
{
- u64 *pte = fetch_pte(dom, bus_addr);
+ u64 *pte = fetch_pte(dom, bus_addr, map_size);
if (pte)
*pte = 0;
@@ -668,7 +668,7 @@ static int init_unity_mappings_for_device(struct dma_ops_domain *dma_dom,
* there is one, it returns the pointer to it.
*/
static u64 *fetch_pte(struct protection_domain *domain,
- unsigned long address)
+ unsigned long address, int map_size)
{
int level;
u64 *pte;
@@ -676,7 +676,7 @@ static u64 *fetch_pte(struct protection_domain *domain,
level = domain->mode - 1;
pte = &domain->pt_root[PM_LEVEL_INDEX(level, address)];
- while (level > 0) {
+ while (level > map_size) {
if (!IOMMU_PTE_PRESENT(*pte))
return NULL;
@@ -684,6 +684,11 @@ static u64 *fetch_pte(struct protection_domain *domain,
pte = IOMMU_PTE_PAGE(*pte);
pte = &pte[PM_LEVEL_INDEX(level, address)];
+
+ if ((PM_PTE_LEVEL(*pte) == 0) && level != map_size) {
+ pte = NULL;
+ break;
+ }
}
return pte;
@@ -757,7 +762,7 @@ static int alloc_new_range(struct amd_iommu *iommu,
for (i = dma_dom->aperture[index]->offset;
i < dma_dom->aperture_size;
i += PAGE_SIZE) {
- u64 *pte = fetch_pte(&dma_dom->domain, i);
+ u64 *pte = fetch_pte(&dma_dom->domain, i, PM_MAP_4k);
if (!pte || !IOMMU_PTE_PRESENT(*pte))
continue;
@@ -2192,7 +2197,7 @@ static void amd_iommu_unmap_range(struct iommu_domain *dom,
iova &= PAGE_MASK;
for (i = 0; i < npages; ++i) {
- iommu_unmap_page(domain, iova);
+ iommu_unmap_page(domain, iova, PM_MAP_4k);
iova += PAGE_SIZE;
}
@@ -2207,7 +2212,7 @@ static phys_addr_t amd_iommu_iova_to_phys(struct iommu_domain *dom,
phys_addr_t paddr;
u64 *pte;
- pte = fetch_pte(domain, iova);
+ pte = fetch_pte(domain, iova, PM_MAP_4k);
if (!pte || !IOMMU_PTE_PRESENT(*pte))
return 0;
--
1.6.3.3
next prev parent reply other threads:[~2009-09-04 9:42 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-09-04 9:40 [PATCH 0/14] Page table handling updates for AMD-IOMMU (AMD-Vi) Joerg Roedel
2009-09-04 9:40 ` [PATCH 01/14] x86/amd-iommu: Make fetch_pte aware of dynamic mapping levels Joerg Roedel
2009-09-04 9:40 ` [PATCH 02/14] x86/amd-iommu: Use fetch_pte in iommu_unmap_page Joerg Roedel
2009-09-04 9:40 ` [PATCH 03/14] x86/amd-iommu: Use fetch_pte in amd_iommu_iova_to_phys Joerg Roedel
2009-09-04 9:40 ` [PATCH 04/14] x86/amd-iommu: Add a gneric version of amd_iommu_flush_all_devices Joerg Roedel
2009-09-04 9:40 ` [PATCH 05/14] x86/amd-iommu: Introduce set_dte_entry function Joerg Roedel
2009-09-04 9:40 ` [PATCH 06/14] x86/amd-iommu: Flush domains if address space size was increased Joerg Roedel
2009-09-04 9:40 ` [PATCH 07/14] x86/amd-iommu: Introduce increase_address_space function Joerg Roedel
2009-09-04 9:40 ` [PATCH 08/14] x86/amd-iommu: Change alloc_pte to support 64 bit address space Joerg Roedel
2009-09-04 9:40 ` [PATCH 09/14] x86/amd-iommu: Remove last usages of IOMMU_PTE_L0_INDEX Joerg Roedel
2009-09-04 9:40 ` [PATCH 10/14] x86/amd-iommu: Remove bus_addr check in iommu_map_page Joerg Roedel
2009-09-04 9:40 ` [PATCH 11/14] x86/amd-iommu: Use 2-level page tables for dma_ops domains Joerg Roedel
2009-09-04 9:40 ` [PATCH 12/14] x86/amd-iommu: Remove old page table handling macros Joerg Roedel
2009-09-04 9:40 ` Joerg Roedel [this message]
2009-09-04 9:40 ` [PATCH 14/14] x86/amd-iommu: Change iommu_map_page to support multiple page sizes Joerg Roedel
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