mirror of https://lore.kernel.org/lkml/
 help / color / mirror / Atom feed
From: Joerg Roedel <joerg.roedel@amd.com>
To: iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org
Cc: Joerg Roedel <joerg.roedel@amd.com>
Subject: [PATCH 01/14] x86/amd-iommu: Make fetch_pte aware of dynamic mapping levels
Date: Fri, 4 Sep 2009 11:40:39 +0200	[thread overview]
Message-ID: <1252057252-32074-2-git-send-email-joerg.roedel@amd.com> (raw)
In-Reply-To: <1252057252-32074-1-git-send-email-joerg.roedel@amd.com>

This patch changes the fetch_pte function in the AMD IOMMU
driver to support dynamic mapping levels.

Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
---
 arch/x86/include/asm/amd_iommu_types.h |    9 +++++++++
 arch/x86/kernel/amd_iommu.c            |   24 +++++++++++++-----------
 2 files changed, 22 insertions(+), 11 deletions(-)

diff --git a/arch/x86/include/asm/amd_iommu_types.h b/arch/x86/include/asm/amd_iommu_types.h
index 0c878ca..7fce4ef 100644
--- a/arch/x86/include/asm/amd_iommu_types.h
+++ b/arch/x86/include/asm/amd_iommu_types.h
@@ -146,12 +146,21 @@
 #define PAGE_MODE_1_LEVEL 0x01
 #define PAGE_MODE_2_LEVEL 0x02
 #define PAGE_MODE_3_LEVEL 0x03
+#define PAGE_MODE_4_LEVEL 0x04
+#define PAGE_MODE_5_LEVEL 0x05
+#define PAGE_MODE_6_LEVEL 0x06
 
 #define IOMMU_PDE_NL_0   0x000ULL
 #define IOMMU_PDE_NL_1   0x200ULL
 #define IOMMU_PDE_NL_2   0x400ULL
 #define IOMMU_PDE_NL_3   0x600ULL
 
+#define PM_LEVEL_SHIFT(x)	(12 + ((x) * 9))
+#define PM_LEVEL_SIZE(x)	(((x) < 6) ? \
+				  ((1ULL << PM_LEVEL_SHIFT((x))) - 1): \
+				   (0xffffffffffffffffULL))
+#define PM_LEVEL_INDEX(x, a)	(((a) >> PM_LEVEL_SHIFT((x))) & 0x1ffULL)
+
 #define IOMMU_PTE_L2_INDEX(address) (((address) >> 30) & 0x1ffULL)
 #define IOMMU_PTE_L1_INDEX(address) (((address) >> 21) & 0x1ffULL)
 #define IOMMU_PTE_L0_INDEX(address) (((address) >> 12) & 0x1ffULL)
diff --git a/arch/x86/kernel/amd_iommu.c b/arch/x86/kernel/amd_iommu.c
index 6c99f50..29bcd35 100644
--- a/arch/x86/kernel/amd_iommu.c
+++ b/arch/x86/kernel/amd_iommu.c
@@ -61,6 +61,8 @@ static u64* alloc_pte(struct protection_domain *dom,
 static void dma_ops_reserve_addresses(struct dma_ops_domain *dom,
 				      unsigned long start_page,
 				      unsigned int pages);
+static u64 *fetch_pte(struct protection_domain *domain,
+		      unsigned long address);
 
 #ifndef BUS_NOTIFY_UNBOUND_DRIVER
 #define BUS_NOTIFY_UNBOUND_DRIVER 0x0005
@@ -670,24 +672,24 @@ static int init_unity_mappings_for_device(struct dma_ops_domain *dma_dom,
  * This function checks if there is a PTE for a given dma address. If
  * there is one, it returns the pointer to it.
  */
-static u64* fetch_pte(struct protection_domain *domain,
+static u64 *fetch_pte(struct protection_domain *domain,
 		      unsigned long address)
 {
+	int level;
 	u64 *pte;
 
-	pte = &domain->pt_root[IOMMU_PTE_L2_INDEX(address)];
+	level =  domain->mode - 1;
+	pte   = &domain->pt_root[PM_LEVEL_INDEX(level, address)];
 
-	if (!IOMMU_PTE_PRESENT(*pte))
-		return NULL;
+	while (level > 0) {
+		if (!IOMMU_PTE_PRESENT(*pte))
+			return NULL;
 
-	pte = IOMMU_PTE_PAGE(*pte);
-	pte = &pte[IOMMU_PTE_L1_INDEX(address)];
+		level -= 1;
 
-	if (!IOMMU_PTE_PRESENT(*pte))
-		return NULL;
-
-	pte = IOMMU_PTE_PAGE(*pte);
-	pte = &pte[IOMMU_PTE_L0_INDEX(address)];
+		pte = IOMMU_PTE_PAGE(*pte);
+		pte = &pte[PM_LEVEL_INDEX(level, address)];
+	}
 
 	return pte;
 }
-- 
1.6.3.3



  reply	other threads:[~2009-09-04  9:42 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2009-09-04  9:40 [PATCH 0/14] Page table handling updates for AMD-IOMMU (AMD-Vi) Joerg Roedel
2009-09-04  9:40 ` Joerg Roedel [this message]
2009-09-04  9:40 ` [PATCH 02/14] x86/amd-iommu: Use fetch_pte in iommu_unmap_page Joerg Roedel
2009-09-04  9:40 ` [PATCH 03/14] x86/amd-iommu: Use fetch_pte in amd_iommu_iova_to_phys Joerg Roedel
2009-09-04  9:40 ` [PATCH 04/14] x86/amd-iommu: Add a gneric version of amd_iommu_flush_all_devices Joerg Roedel
2009-09-04  9:40 ` [PATCH 05/14] x86/amd-iommu: Introduce set_dte_entry function Joerg Roedel
2009-09-04  9:40 ` [PATCH 06/14] x86/amd-iommu: Flush domains if address space size was increased Joerg Roedel
2009-09-04  9:40 ` [PATCH 07/14] x86/amd-iommu: Introduce increase_address_space function Joerg Roedel
2009-09-04  9:40 ` [PATCH 08/14] x86/amd-iommu: Change alloc_pte to support 64 bit address space Joerg Roedel
2009-09-04  9:40 ` [PATCH 09/14] x86/amd-iommu: Remove last usages of IOMMU_PTE_L0_INDEX Joerg Roedel
2009-09-04  9:40 ` [PATCH 10/14] x86/amd-iommu: Remove bus_addr check in iommu_map_page Joerg Roedel
2009-09-04  9:40 ` [PATCH 11/14] x86/amd-iommu: Use 2-level page tables for dma_ops domains Joerg Roedel
2009-09-04  9:40 ` [PATCH 12/14] x86/amd-iommu: Remove old page table handling macros Joerg Roedel
2009-09-04  9:40 ` [PATCH 13/14] x86/amd-iommu: Support higher level PTEs in iommu_page_unmap Joerg Roedel
2009-09-04  9:40 ` [PATCH 14/14] x86/amd-iommu: Change iommu_map_page to support multiple page sizes Joerg Roedel

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1252057252-32074-2-git-send-email-joerg.roedel@amd.com \
    --to=joerg.roedel@amd.com \
    --cc=iommu@lists.linux-foundation.org \
    --cc=linux-kernel@vger.kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox

all inboxes | Powered by JetHome®