From: Joerg Roedel <joerg.roedel@amd.com>
To: iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org
Cc: Joerg Roedel <joerg.roedel@amd.com>
Subject: [PATCH 07/14] x86/amd-iommu: Introduce increase_address_space function
Date: Fri, 4 Sep 2009 11:40:45 +0200 [thread overview]
Message-ID: <1252057252-32074-8-git-send-email-joerg.roedel@amd.com> (raw)
In-Reply-To: <1252057252-32074-1-git-send-email-joerg.roedel@amd.com>
This function will be used to increase the address space
size of a protection domain.
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
---
arch/x86/include/asm/amd_iommu_types.h | 4 ++++
arch/x86/kernel/amd_iommu.c | 27 +++++++++++++++++++++++++++
2 files changed, 31 insertions(+), 0 deletions(-)
diff --git a/arch/x86/include/asm/amd_iommu_types.h b/arch/x86/include/asm/amd_iommu_types.h
index 97f3d09..1b4b3d6 100644
--- a/arch/x86/include/asm/amd_iommu_types.h
+++ b/arch/x86/include/asm/amd_iommu_types.h
@@ -160,6 +160,10 @@
((1ULL << PM_LEVEL_SHIFT((x))) - 1): \
(0xffffffffffffffffULL))
#define PM_LEVEL_INDEX(x, a) (((a) >> PM_LEVEL_SHIFT((x))) & 0x1ffULL)
+#define PM_LEVEL_ENC(x) (((x) << 9) & 0xe00ULL)
+#define PM_LEVEL_PDE(x, a) ((a) | PM_LEVEL_ENC((x)) | \
+ IOMMU_PTE_P | IOMMU_PTE_IR | IOMMU_PTE_IW)
+
#define IOMMU_PTE_L2_INDEX(address) (((address) >> 30) & 0x1ffULL)
#define IOMMU_PTE_L1_INDEX(address) (((address) >> 21) & 0x1ffULL)
diff --git a/arch/x86/kernel/amd_iommu.c b/arch/x86/kernel/amd_iommu.c
index 5eab6a8..fc97b51 100644
--- a/arch/x86/kernel/amd_iommu.c
+++ b/arch/x86/kernel/amd_iommu.c
@@ -1325,6 +1325,33 @@ static void update_domain(struct protection_domain *domain)
}
/*
+ * This function is used to add another level to an IO page table. Adding
+ * another level increases the size of the address space by 9 bits to a size up
+ * to 64 bits.
+ */
+static bool increase_address_space(struct protection_domain *domain,
+ gfp_t gfp)
+{
+ u64 *pte;
+
+ if (domain->mode == PAGE_MODE_6_LEVEL)
+ /* address space already 64 bit large */
+ return false;
+
+ pte = (void *)get_zeroed_page(gfp);
+ if (!pte)
+ return false;
+
+ *pte = PM_LEVEL_PDE(domain->mode,
+ virt_to_phys(domain->pt_root));
+ domain->pt_root = pte;
+ domain->mode += 1;
+ domain->updated = true;
+
+ return true;
+}
+
+/*
* If the pte_page is not yet allocated this function is called
*/
static u64* alloc_pte(struct protection_domain *dom,
--
1.6.3.3
next prev parent reply other threads:[~2009-09-04 9:43 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-09-04 9:40 [PATCH 0/14] Page table handling updates for AMD-IOMMU (AMD-Vi) Joerg Roedel
2009-09-04 9:40 ` [PATCH 01/14] x86/amd-iommu: Make fetch_pte aware of dynamic mapping levels Joerg Roedel
2009-09-04 9:40 ` [PATCH 02/14] x86/amd-iommu: Use fetch_pte in iommu_unmap_page Joerg Roedel
2009-09-04 9:40 ` [PATCH 03/14] x86/amd-iommu: Use fetch_pte in amd_iommu_iova_to_phys Joerg Roedel
2009-09-04 9:40 ` [PATCH 04/14] x86/amd-iommu: Add a gneric version of amd_iommu_flush_all_devices Joerg Roedel
2009-09-04 9:40 ` [PATCH 05/14] x86/amd-iommu: Introduce set_dte_entry function Joerg Roedel
2009-09-04 9:40 ` [PATCH 06/14] x86/amd-iommu: Flush domains if address space size was increased Joerg Roedel
2009-09-04 9:40 ` Joerg Roedel [this message]
2009-09-04 9:40 ` [PATCH 08/14] x86/amd-iommu: Change alloc_pte to support 64 bit address space Joerg Roedel
2009-09-04 9:40 ` [PATCH 09/14] x86/amd-iommu: Remove last usages of IOMMU_PTE_L0_INDEX Joerg Roedel
2009-09-04 9:40 ` [PATCH 10/14] x86/amd-iommu: Remove bus_addr check in iommu_map_page Joerg Roedel
2009-09-04 9:40 ` [PATCH 11/14] x86/amd-iommu: Use 2-level page tables for dma_ops domains Joerg Roedel
2009-09-04 9:40 ` [PATCH 12/14] x86/amd-iommu: Remove old page table handling macros Joerg Roedel
2009-09-04 9:40 ` [PATCH 13/14] x86/amd-iommu: Support higher level PTEs in iommu_page_unmap Joerg Roedel
2009-09-04 9:40 ` [PATCH 14/14] x86/amd-iommu: Change iommu_map_page to support multiple page sizes Joerg Roedel
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