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* Re: G400 behavior different, 2.2.18->2.4.0
@ 2001-01-16 23:27 Petr Vandrovec
  0 siblings, 0 replies; 2+ messages in thread
From: Petr Vandrovec @ 2001-01-16 23:27 UTC (permalink / raw)
  To: Chad Miller; +Cc: linux-kernel, mj

On 16 Jan 01 at 17:16, Chad Miller wrote:

(added mj@suse.cz, as he may be interested in one range behind bridge 
overlapping both forwarding ranges...)

> #00:01.0 PCI bridge: VIA Technologies, Inc. VT8371 [KX133 AGP]  (prog-if \
> #00 [Normal decode])
> #   Flags: bus master, 66Mhz, medium devsel, latency 0
> #   Bus: primary=00, secondary=01, subordinate=01, sec-latency=0
> #   Memory behind bridge: d4000000-d6ffffff
> #   Prefetchable memory behind bridge: d7000000-d8ffffff
> #   Capabilities: [80] Power Management version 2
> #01:00.0 VGA compatible controller: Matrox Graphics, Inc. MGA G400 AGP \
> #(rev 05) (prog-if 00 [VGA])
> #   Subsystem: Matrox Graphics, Inc. Millennium G400 MAX/Dual Head 32Mb
> #   Flags: bus master, VGA palette snoop, medium devsel, latency 32, IRQ 10
> #   Memory at d6000000 (32-bit, prefetchable)
> #   Memory at d4000000 (32-bit, non-prefetchable)
> #   Memory at d5000000 (32-bit, non-prefetchable)
> #   Capabilities: [dc] Power Management version 2
> #   Capabilities: [f0] AGP version 2.0

Please, add your BIOS into list of broken BIOSes and stop complaining ;-)

Your BIOS splitted 32MB G400 range into 16MB non-prefetchable d600-d6ff 
and 16MB prefetchable (d700-d7ff) range. Probably BIOS though that it
is setting G400 framebuffer at D7000000 for 32MB, but as D7000000 is not
multiple of 32MB, it cannot work.

You should try upgrading BIOS. If it does not help... you can try
kernel resources assigning code, but as it skips VGA adapters currently,
it is long way to go.

BTW, correct BIOS should put G400's resource #1 at D4000000, #2 at D4800000,
and #0 at D6000000. Programming non-prefetchable range for D400-D4FF,
and prefetchable as D600-D7FF... Leaving D5xx unused. 
                                    Sorry for bad news,
                                                Petr Vandrovec
                                                vandrove@vc.cvut.cz
                                                
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^ permalink raw reply	[flat|nested] 2+ messages in thread
* Re: G400 behavior different, 2.2.18->2.4.0 (was: matroxfb o
@ 2001-01-16 22:40 Petr Vandrovec
  2001-01-16 22:16 ` G400 behavior different, 2.2.18->2.4.0 Chad Miller
  0 siblings, 1 reply; 2+ messages in thread
From: Petr Vandrovec @ 2001-01-16 22:40 UTC (permalink / raw)
  To: Chad Miller; +Cc: linux-kernel

On 16 Jan 01 at 15:55, Chad Miller wrote:
> (CC'd to lkml)
> 
> On Tue, Jan 16, 2001 at 07:31:33PM +0000, Petr Vandrovec wrote:
> > There is something wrong with your hardware. First region for G400 should
> > be 32MB, not 16MB (even if you have 16MB G400, which I doubt).
> 
> Ooo!  Here's an edited diff of 'lspci -v' under 2.2.18 versus 2.4.0:
> 
> 36,41c37,42
> <   Flags: bus master, VGA palette snoop, medium devsel, latency 32, IRQ 10
> <   Memory at d6000000 (32-bit, prefetchable)
> ---
> >   Flags: bus master, VGA palette snoop, medium devsel, latency 64, IRQ 10
> >   Memory at d8000000 (32-bit, prefetchable) [size=16M]

> Do you think any configuration parameters could affect this?  (I haven't
> paid as much attention to the evolution from 2.2 to 2.4 as I should've.)
> 
> Here's the diff of X' output, from 2.2.18 to 2.4.0:
> 
> 43c43
> < (--) PCI:*(1:0:0) Matrox MGA G400 AGP rev 5, Mem @ 0xd6000000/25, 0xd4000000/14, 0xd5000000/23
> ---
> > (--) PCI:*(1:0:0) Matrox MGA G400 AGP rev 5, Mem @ 0xd6000000/24, 0xd4000000/14, 0xd5000000/23
> 72,73d71
> < (WW) ****INVALID MEM ALLOCATION**** b: 0xd6000000 e: 0xd7ffffff correcting\a
> < (EE) Cannot find a replacement memory range

Output under 2.2.x is correct: '/25' for 32MB range. I have no idea
why X complains about region D6000000-D7FFFFFF - can you look at
'... regions behind bridge' when you boot 2.2.x (they are on 0:01.0
device, AFAIK) ? Under 2.4.x you showed that prefetchable region is 
D6000000-D8FFFFFF, which correctly covers 2.2.x framebuffer address
(although it is not power of 2, but who knows...).

You should see D4000000-D5FFFFFF as non-prefetchable memory behind bridge,
and D6000000-D7FFFFFF as prefetchable memory behind bridge.
                                        Best regards,
                                                Petr Vandrovec
                                                vandrove@vc.cvut.cz
                                                
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^ permalink raw reply	[flat|nested] 2+ messages in thread
end of thread, other threads:[~2001-01-16 22:28 UTC | newest]

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2001-01-16 23:27 G400 behavior different, 2.2.18->2.4.0 Petr Vandrovec
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2001-01-16 22:40 G400 behavior different, 2.2.18->2.4.0 (was: matroxfb o Petr Vandrovec
2001-01-16 22:16 ` G400 behavior different, 2.2.18->2.4.0 Chad Miller

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