From: Lizhi Hou <lizhi.hou@amd.com>
To: Jeffrey Hugo <quic_jhugo@quicinc.com>, <ogabbay@kernel.org>,
<dri-devel@lists.freedesktop.org>
Cc: <linux-kernel@vger.kernel.org>, <min.ma@amd.com>,
<max.zhen@amd.com>, <sonal.santan@amd.com>, <king.tam@amd.com>,
Narendra Gutta <VenkataNarendraKumar.Gutta@amd.com>,
George Yang <George.Yang@amd.com>
Subject: Re: [PATCH V3 02/11] accel/amdxdna: Add a new driver for AMD AI Engine
Date: Sun, 6 Oct 2024 21:01:56 -0700 [thread overview]
Message-ID: <12f54522-4c4c-30d4-8046-f77a67db0bcb@amd.com> (raw)
In-Reply-To: <f81addf5-f9eb-5d39-313e-b18788cd8418@quicinc.com>
On 10/4/24 10:21, Jeffrey Hugo wrote:
> On 9/11/2024 12:05 PM, Lizhi Hou wrote:
>> diff --git a/drivers/accel/amdxdna/aie2_pci.c
>> b/drivers/accel/amdxdna/aie2_pci.c
>> new file mode 100644
>> index 000000000000..e21b32557fc2
>> --- /dev/null
>> +++ b/drivers/accel/amdxdna/aie2_pci.c
>> @@ -0,0 +1,183 @@
>> +// SPDX-License-Identifier: GPL-2.0
>> +/*
>> + * Copyright (C) 2023-2024, Advanced Micro Devices, Inc.
>> + */
>> +
>> +#include <drm/drm_device.h>
>> +#include <drm/drm_managed.h>
>> +#include <drm/drm_print.h>
>> +#include <linux/errno.h>
>> +#include <linux/firmware.h>
>> +#include <linux/iommu.h>
>> +#include <linux/pci.h>
>> +
>> +#include "amdxdna_pci_drv.h"
>> +#include "aie2_pci.h"
>
> Feels like a blank line is missing here.
sure. Will add it.
>
>> +static void aie2_hw_stop(struct amdxdna_dev *xdna)
>> +{
>> + struct pci_dev *pdev = to_pci_dev(xdna->ddev.dev);
>> + struct amdxdna_dev_hdl *ndev = xdna->dev_handle;
>> +
>> + aie2_psp_stop(ndev->psp_hdl);
>> + aie2_smu_fini(ndev);
>> + pci_disable_device(pdev);
>> +}
>> diff --git a/drivers/accel/amdxdna/aie2_pci.h
>> b/drivers/accel/amdxdna/aie2_pci.h
>> new file mode 100644
>> index 000000000000..b3c360a10c04
>> --- /dev/null
>> +++ b/drivers/accel/amdxdna/aie2_pci.h
>> @@ -0,0 +1,130 @@
>> +/* SPDX-License-Identifier: GPL-2.0 */
>> +/*
>> + * Copyright (C) 2023-2024, Advanced Micro Devices, Inc.
>> + */
>> +
>> +#ifndef _AIE2_PCI_H_
>> +#define _AIE2_PCI_H_
>> +
>> +#define AIE2_INTERVAL 20000 /* us */
>> +#define AIE2_TIMEOUT 1000000 /* us */
>> +
>> +/* Firmware determines device memory base address and size */
>> +#define AIE2_DEVM_BASE 0x4000000
>> +#define AIE2_DEVM_SIZE (64 * SZ_1M)
>
> SZ_64M? Then the code, and reader's brains, are not doing multiplication.
ok.
>
>> diff --git a/drivers/accel/amdxdna/amdxdna_pci_drv.c
>> b/drivers/accel/amdxdna/amdxdna_pci_drv.c
>> new file mode 100644
>> index 000000000000..33133f2503cd
>> --- /dev/null
>> +++ b/drivers/accel/amdxdna/amdxdna_pci_drv.c
>> @@ -0,0 +1,128 @@
>> +// SPDX-License-Identifier: GPL-2.0
>> +/*
>> + * Copyright (C) 2022-2024, Advanced Micro Devices, Inc.
>> + */
>> +
>> +#include <drm/drm_accel.h>
>> +#include <drm/drm_drv.h>
>> +#include <drm/drm_gem.h>
>> +#include <drm/drm_ioctl.h>
>> +#include <drm/drm_managed.h>
>> +#include <linux/pci.h>
>> +
>> +#include "amdxdna_pci_drv.h"
>> +
>> +/*
>> + * Bind the driver base on PCI class and later use the (device_id,
>> rev_id)
>> + * pair as a key to select the devices. The devices with same
>> device_id
>> + * have very similar interface to host driver.
>> + */
>
> Looks like this comment didn't get updated when the class matching was
> removed.
I will fix the comment.
Thanks,
Lizhi
>
>> +static const struct pci_device_id pci_ids[] = {
>> + { PCI_DEVICE(PCI_VENDOR_ID_AMD, 0x1502) },
>> + { PCI_DEVICE(PCI_VENDOR_ID_AMD, 0x17f0) },
>> + {0}
>> +};
>> +
>> +MODULE_DEVICE_TABLE(pci, pci_ids);
next prev parent reply other threads:[~2024-10-07 4:04 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-09-11 18:05 [PATCH V3 00/11] AMD XDNA driver Lizhi Hou
2024-09-11 18:05 ` [PATCH V3 01/11] accel/amdxdna: Add documentation for AMD NPU accelerator driver Lizhi Hou
2024-10-04 17:06 ` Jeffrey Hugo
2024-10-05 0:27 ` Lizhi Hou
2024-09-11 18:05 ` [PATCH V3 02/11] accel/amdxdna: Add a new driver for AMD AI Engine Lizhi Hou
2024-10-04 17:21 ` Jeffrey Hugo
2024-10-07 4:01 ` Lizhi Hou [this message]
2024-09-11 18:05 ` [PATCH V3 03/11] accel/amdxdna: Support hardware mailbox Lizhi Hou
2024-10-04 17:34 ` Jeffrey Hugo
2024-10-07 4:15 ` Lizhi Hou
2024-10-07 15:34 ` Jeffrey Hugo
2024-09-11 18:05 ` [PATCH V3 04/11] accel/amdxdna: Add hardware resource solver Lizhi Hou
2024-10-04 17:36 ` Jeffrey Hugo
2024-09-11 18:05 ` [PATCH V3 05/11] accel/amdxdna: Add hardware context Lizhi Hou
2024-10-04 17:50 ` Jeffrey Hugo
2024-10-07 5:02 ` Lizhi Hou
2024-10-07 15:37 ` Jeffrey Hugo
2024-09-11 18:05 ` [PATCH V3 06/11] accel/amdxdna: Add GEM buffer object management Lizhi Hou
2024-09-14 14:07 ` kernel test robot
2024-10-04 17:56 ` Jeffrey Hugo
2024-10-07 22:35 ` Lizhi Hou
2024-09-11 18:06 ` [PATCH V3 07/11] accel/amdxdna: Add command execution Lizhi Hou
2024-10-04 18:01 ` Jeffrey Hugo
2024-10-07 22:51 ` Lizhi Hou
2024-09-11 18:06 ` [PATCH V3 08/11] accel/amdxdna: Add suspend and resume Lizhi Hou
2024-10-04 18:08 ` Jeffrey Hugo
2024-10-08 5:52 ` Lizhi Hou
2024-09-11 18:06 ` [PATCH V3 09/11] accel/amdxdna: Add error handling Lizhi Hou
2024-10-04 18:20 ` Jeffrey Hugo
2024-09-11 18:06 ` [PATCH V3 10/11] accel/amdxdna: Add query functions Lizhi Hou
2024-10-04 18:23 ` Jeffrey Hugo
2024-10-09 16:19 ` Lizhi Hou
2024-09-11 18:06 ` [PATCH V3 11/11] accel/amdxdna: Add firmware debug buffer support Lizhi Hou
2024-10-04 18:33 ` Jeffrey Hugo
2024-10-09 16:22 ` Lizhi Hou
2024-10-09 23:51 ` Lizhi Hou
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