From: Jeffrey Hugo <quic_jhugo@quicinc.com>
To: Lizhi Hou <lizhi.hou@amd.com>, <ogabbay@kernel.org>,
<dri-devel@lists.freedesktop.org>
Cc: <linux-kernel@vger.kernel.org>, <min.ma@amd.com>,
<max.zhen@amd.com>, <sonal.santan@amd.com>, <king.tam@amd.com>
Subject: Re: [PATCH V3 05/11] accel/amdxdna: Add hardware context
Date: Fri, 4 Oct 2024 11:50:30 -0600 [thread overview]
Message-ID: <c1f92388-bd94-ebc2-dd59-0434a3fa63a6@quicinc.com> (raw)
In-Reply-To: <20240911180604.1834434-6-lizhi.hou@amd.com>
On 9/11/2024 12:05 PM, Lizhi Hou wrote:
> diff --git a/drivers/accel/amdxdna/aie2_ctx.c b/drivers/accel/amdxdna/aie2_ctx.c
> new file mode 100644
> index 000000000000..52a71661f887
> --- /dev/null
> +++ b/drivers/accel/amdxdna/aie2_ctx.c
> @@ -0,0 +1,186 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Copyright (C) 2024, Advanced Micro Devices, Inc.
> + */
> +
> +#include <drm/amdxdna_accel.h>
> +#include <drm/drm_device.h>
> +#include <drm/drm_print.h>
> +#include <linux/types.h>
> +
> +#include "amdxdna_ctx.h"
> +#include "amdxdna_mailbox.h"
> +#include "amdxdna_pci_drv.h"
> +#include "aie2_pci.h"
> +#include "aie2_solver.h"
Alphabetical order?
<snip>
> +/**
> + * struct amdxdna_drm_create_hwctx - Create hardware context.
> + * @ext: MBZ.
> + * @ext_flags: MBZ.
> + * @qos_p: Address of QoS info.
> + * @umq_bo: BO handle for user mode queue(UMQ).
> + * @log_buf_bo: BO handle for log buffer.
> + * @max_opc: Maximum operations per cycle.
> + * @num_tiles: Number of AIE tiles.
> + * @mem_size: Size of AIE tile memory.
> + * @umq_doorbell: Returned offset of doorbell associated with UMQ.
> + * @handle: Returned hardware context handle.
> + * @pad: MBZ.
You specify must be zero, but I don't see that checked anywhere.
> + */
> +struct amdxdna_drm_create_hwctx {
> + __u64 ext;
> + __u64 ext_flags;
> + __u64 qos_p;
> + __u32 umq_bo;
> + __u32 log_buf_bo;
> + __u32 max_opc;
> + __u32 num_tiles;
> + __u32 mem_size;
> + __u32 umq_doorbell;
> + __u32 handle;
> + __u32 pad;
> +};
next prev parent reply other threads:[~2024-10-04 17:50 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-09-11 18:05 [PATCH V3 00/11] AMD XDNA driver Lizhi Hou
2024-09-11 18:05 ` [PATCH V3 01/11] accel/amdxdna: Add documentation for AMD NPU accelerator driver Lizhi Hou
2024-10-04 17:06 ` Jeffrey Hugo
2024-10-05 0:27 ` Lizhi Hou
2024-09-11 18:05 ` [PATCH V3 02/11] accel/amdxdna: Add a new driver for AMD AI Engine Lizhi Hou
2024-10-04 17:21 ` Jeffrey Hugo
2024-10-07 4:01 ` Lizhi Hou
2024-09-11 18:05 ` [PATCH V3 03/11] accel/amdxdna: Support hardware mailbox Lizhi Hou
2024-10-04 17:34 ` Jeffrey Hugo
2024-10-07 4:15 ` Lizhi Hou
2024-10-07 15:34 ` Jeffrey Hugo
2024-09-11 18:05 ` [PATCH V3 04/11] accel/amdxdna: Add hardware resource solver Lizhi Hou
2024-10-04 17:36 ` Jeffrey Hugo
2024-09-11 18:05 ` [PATCH V3 05/11] accel/amdxdna: Add hardware context Lizhi Hou
2024-10-04 17:50 ` Jeffrey Hugo [this message]
2024-10-07 5:02 ` Lizhi Hou
2024-10-07 15:37 ` Jeffrey Hugo
2024-09-11 18:05 ` [PATCH V3 06/11] accel/amdxdna: Add GEM buffer object management Lizhi Hou
2024-09-14 14:07 ` kernel test robot
2024-10-04 17:56 ` Jeffrey Hugo
2024-10-07 22:35 ` Lizhi Hou
2024-09-11 18:06 ` [PATCH V3 07/11] accel/amdxdna: Add command execution Lizhi Hou
2024-10-04 18:01 ` Jeffrey Hugo
2024-10-07 22:51 ` Lizhi Hou
2024-09-11 18:06 ` [PATCH V3 08/11] accel/amdxdna: Add suspend and resume Lizhi Hou
2024-10-04 18:08 ` Jeffrey Hugo
2024-10-08 5:52 ` Lizhi Hou
2024-09-11 18:06 ` [PATCH V3 09/11] accel/amdxdna: Add error handling Lizhi Hou
2024-10-04 18:20 ` Jeffrey Hugo
2024-09-11 18:06 ` [PATCH V3 10/11] accel/amdxdna: Add query functions Lizhi Hou
2024-10-04 18:23 ` Jeffrey Hugo
2024-10-09 16:19 ` Lizhi Hou
2024-09-11 18:06 ` [PATCH V3 11/11] accel/amdxdna: Add firmware debug buffer support Lizhi Hou
2024-10-04 18:33 ` Jeffrey Hugo
2024-10-09 16:22 ` Lizhi Hou
2024-10-09 23:51 ` Lizhi Hou
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