From: Keith Packard <keithp@keithp.com>
To: Dave Airlie <airlied@redhat.com>
Cc: linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
intel-gfx@lists.freedesktop.org,
Keith Packard <keithp@keithp.com>
Subject: [PATCH 5/9] drm/i915: Allow SSC parameter to override VBT value
Date: Mon, 26 Sep 2011 23:11:42 -0700 [thread overview]
Message-ID: <1317103906-4649-6-git-send-email-keithp@keithp.com> (raw)
In-Reply-To: <1317103906-4649-1-git-send-email-keithp@keithp.com>
Allow SSC to be enabled even when the BIOS disables it for testing SSC paths.
Signed-off-by: Keith Packard <keithp@keithp.com>
---
drivers/gpu/drm/i915/i915_drv.c | 4 ++--
drivers/gpu/drm/i915/intel_display.c | 4 +++-
2 files changed, 5 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index f07e425..58480de 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -79,11 +79,11 @@ MODULE_PARM_DESC(lvds_downclock,
"Use panel (LVDS/eDP) downclocking for power savings "
"(default: false)");
-unsigned int i915_panel_use_ssc __read_mostly = 1;
+unsigned int i915_panel_use_ssc __read_mostly = -1;
module_param_named(lvds_use_ssc, i915_panel_use_ssc, int, 0600);
MODULE_PARM_DESC(lvds_use_ssc,
"Use Spread Spectrum Clock with panels [LVDS/eDP] "
- "(default: true)");
+ "(default: auto from VBT)");
int i915_vbt_sdvo_panel_type __read_mostly = -1;
module_param_named(vbt_sdvo_panel_type, i915_vbt_sdvo_panel_type, int, 0600);
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 04411ad..6039496 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -4584,7 +4584,9 @@ static void intel_update_watermarks(struct drm_device *dev)
static inline bool intel_panel_use_ssc(struct drm_i915_private *dev_priv)
{
- return dev_priv->lvds_use_ssc && i915_panel_use_ssc
+ if (i915_panel_use_ssc >= 0)
+ return i915_panel_use_ssc != 0;
+ return dev_priv->lvds_use_ssc
&& !(dev_priv->quirks & QUIRK_LVDS_SSC_DISABLE);
}
--
1.7.6.3
next prev parent reply other threads:[~2011-09-27 6:12 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <yunbou6lxb4.fsf@aiko.keithp.com>
2011-09-27 6:11 ` PCH reference clock cleanups Keith Packard
2011-09-27 6:11 ` [PATCH 1/9] drm/i915: broken copyright encoding in intel_bios.c Keith Packard
2011-09-27 6:11 ` [PATCH 2/9] drm/i915: Use DRM_DEBUG_KMS for all messages " Keith Packard
2011-09-27 16:39 ` Chris Wilson
2011-09-27 6:11 ` [PATCH 3/9] drv/i915: Pull display_clock_mode out of VBT table Keith Packard
2011-09-27 16:40 ` Chris Wilson
2011-09-27 6:11 ` [PATCH 4/9] drm/i915: Document a few more BDB_GENERAL_FEATURES bits from PCH BIOS Keith Packard
2011-09-27 6:11 ` Keith Packard [this message]
2011-09-27 16:41 ` [PATCH 5/9] drm/i915: Allow SSC parameter to override VBT value Chris Wilson
2011-09-27 6:11 ` [PATCH 6/9] drm/i915: Fix PCH SSC reference clock settings Keith Packard
2011-09-27 16:47 ` Chris Wilson
2011-09-27 18:03 ` Keith Packard
2011-09-28 9:09 ` Chris Wilson
2011-09-28 16:36 ` Keith Packard
2011-09-27 6:11 ` [PATCH 7/9] drm/i915: Use CK505 as non-SSC source where available Keith Packard
2011-09-27 16:49 ` Chris Wilson
2011-09-27 6:11 ` [PATCH 8/9] drm/i915: All PCH refclks are 120MHz Keith Packard
2011-09-27 16:53 ` Chris Wilson
2011-09-27 6:11 ` [PATCH 9/9] drm/i915: Initialize PCH refclks at modeset init time Keith Packard
2011-09-27 16:56 ` Chris Wilson
2011-09-27 18:11 ` Keith Packard
2011-10-03 21:12 ` [Intel-gfx] " Jesse Barnes
2011-09-28 23:15 ` Keith Packard
2011-09-27 9:01 ` PCH reference clock cleanups Chris Wilson
2011-09-27 16:54 ` Keith Packard
2011-09-28 18:22 ` [Intel-gfx] " Paulo Zanoni
2011-09-28 20:02 ` Keith Packard
2011-10-03 21:14 ` Jesse Barnes
2011-10-03 23:18 ` Keith Packard
2011-10-03 23:21 ` Jesse Barnes
2011-10-03 23:39 ` Keith Packard
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