From: Andi Kleen <andi@firstfloor.org>
To: mingo@elte.hu
Cc: linux-kernel@vger.kernel.org, a.p.zijlstra@chello.nl,
akpm@linux-foundation.org, acme@redhat.com, eranian@google.com,
jolsa@redhat.com, namhyung@kernel.org,
Andi Kleen <ak@linux.intel.com>
Subject: [PATCH 24/29] perf, x86: Support CPU specific sysfs events
Date: Thu, 17 Jan 2013 12:36:47 -0800 [thread overview]
Message-ID: <1358455012-12287-25-git-send-email-andi@firstfloor.org> (raw)
In-Reply-To: <1358455012-12287-1-git-send-email-andi@firstfloor.org>
From: Andi Kleen <ak@linux.intel.com>
Add a way for the CPU initialization code to register additional events,
and merge them into the events attribute directory. Used in the next
patch.
Signed-off-by: Andi Kleen <ak@linux.intel.com>
---
arch/x86/kernel/cpu/perf_event.c | 29 +++++++++++++++++++++++++++++
arch/x86/kernel/cpu/perf_event.h | 1 +
2 files changed, 30 insertions(+), 0 deletions(-)
diff --git a/arch/x86/kernel/cpu/perf_event.c b/arch/x86/kernel/cpu/perf_event.c
index 6cdc012..e3a202a 100644
--- a/arch/x86/kernel/cpu/perf_event.c
+++ b/arch/x86/kernel/cpu/perf_event.c
@@ -1343,6 +1343,30 @@ static void __init filter_events(struct attribute **attrs)
}
}
+/* Merge two pointer arrays */
+static __init struct attribute **merge_attr(struct attribute **a,
+ struct attribute **b)
+{
+ struct attribute **new;
+ int j, i;
+
+ for (j = 0; a[j]; j++)
+ ;
+ for (i = 0; b[i]; i++)
+ j++;
+ j++;
+ new = kmalloc(sizeof(struct attribute *) * j, GFP_KERNEL);
+ if (!new)
+ return a;
+ j = 0;
+ for (i = 0; a[i]; i++)
+ new[j++] = a[i];
+ for (i = 0; b[i]; i++)
+ new[j++] = b[i];
+ new[j] = NULL;
+ return new;
+}
+
ssize_t events_sysfs_show(struct device *dev, struct device_attribute *attr,
char *page)
{
@@ -1480,6 +1504,11 @@ static int __init init_hw_perf_events(void)
else
filter_events(x86_pmu_events_group.attrs);
+ if (x86_pmu.cpu_events)
+ x86_pmu_events_group.attrs =
+ merge_attr(x86_pmu_events_group.attrs,
+ x86_pmu.cpu_events);
+
pr_info("... version: %d\n", x86_pmu.version);
pr_info("... bit width: %d\n", x86_pmu.cntval_bits);
pr_info("... generic registers: %d\n", x86_pmu.num_counters);
diff --git a/arch/x86/kernel/cpu/perf_event.h b/arch/x86/kernel/cpu/perf_event.h
index 8253b73..ba5d043 100644
--- a/arch/x86/kernel/cpu/perf_event.h
+++ b/arch/x86/kernel/cpu/perf_event.h
@@ -360,6 +360,7 @@ struct x86_pmu {
struct attribute **format_attrs;
ssize_t (*events_sysfs_show)(char *page, u64 config);
+ struct attribute **cpu_events;
/*
* CPU Hotplug hooks
--
1.7.7.6
next prev parent reply other threads:[~2013-01-17 20:37 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-01-17 20:36 perf PMU support for Haswell v7 Andi Kleen
2013-01-17 20:36 ` [PATCH 01/29] perf, x86: Add PEBSv2 record support Andi Kleen
2013-01-17 20:36 ` [PATCH 02/29] perf, x86: Basic Haswell PMU support v2 Andi Kleen
2013-01-17 20:36 ` [PATCH 03/29] perf, x86: Basic Haswell PEBS support v3 Andi Kleen
2013-01-17 20:36 ` [PATCH 04/29] perf, x86: Support the TSX intx/intx_cp qualifiers v2 Andi Kleen
2013-01-17 20:36 ` [PATCH 05/29] perf, kvm: Support the intx/intx_cp modifiers in KVM arch perfmon emulation v4 Andi Kleen
2013-01-20 14:04 ` Gleb Natapov
2013-01-17 20:36 ` [PATCH 06/29] perf, x86: Support PERF_SAMPLE_ADDR on Haswell Andi Kleen
2013-01-17 20:36 ` [PATCH 07/29] perf, x86: Support Haswell v4 LBR format Andi Kleen
2013-01-17 20:36 ` [PATCH 08/29] perf, x86: Disable LBR recording for unknown LBR_FMT Andi Kleen
2013-01-17 20:36 ` [PATCH 09/29] perf, x86: Support LBR filtering by INTX/NOTX/ABORT v2 Andi Kleen
2013-01-17 20:36 ` [PATCH 10/29] perf, tools: Add abort_tx,no_tx,in_tx branch filter options to perf record -j v3 Andi Kleen
2013-01-17 20:36 ` [PATCH 11/29] perf, tools: Support sorting by intx, abort branch flags v2 Andi Kleen
2013-01-17 20:36 ` [PATCH 12/29] perf, x86: Support full width counting Andi Kleen
2013-01-17 20:36 ` [PATCH 13/29] perf, x86: Avoid checkpointed counters causing excessive TSX aborts v3 Andi Kleen
2013-01-17 20:36 ` [PATCH 14/29] perf, core: Add a concept of a weightened sample v2 Andi Kleen
2013-01-17 20:36 ` [PATCH 15/29] perf, x86: Support weight samples for PEBS Andi Kleen
2013-01-17 20:36 ` [PATCH 16/29] perf, tools: Add support for weight v7 Andi Kleen
2013-01-23 11:38 ` Stephane Eranian
2013-01-23 11:54 ` Stephane Eranian
2013-01-23 16:56 ` Andi Kleen
2013-01-23 17:00 ` Stephane Eranian
2013-01-23 17:13 ` Andi Kleen
2013-01-23 17:25 ` Stephane Eranian
2013-01-23 18:02 ` Andi Kleen
2013-01-23 18:18 ` Stephane Eranian
2013-01-23 18:50 ` Andi Kleen
2013-01-23 18:57 ` Stephane Eranian
2013-01-17 20:36 ` [PATCH 17/29] perf, core: Add generic transaction flags v3 Andi Kleen
2013-01-17 20:36 ` [PATCH 18/29] perf, x86: Add Haswell specific transaction flag reporting Andi Kleen
2013-01-17 20:36 ` [PATCH 19/29] perf, tools: Add support for record transaction flags v3 Andi Kleen
2013-01-17 20:36 ` [PATCH 20/29] perf, tools: Add browser support for transaction flags v5 Andi Kleen
2013-01-17 20:36 ` [PATCH 21/29] perf, x86: Move NMI clearing to end of PMI handler after the counter registers are reset Andi Kleen
2013-01-17 20:36 ` [PATCH 22/29] tools, perf: Add a precise event qualifier v2 Andi Kleen
2013-01-17 20:36 ` [PATCH 23/29] perf, x86: improve sysfs event mapping with event string Andi Kleen
2013-01-17 20:36 ` Andi Kleen [this message]
2013-01-17 20:36 ` [PATCH 25/29] perf, x86: Add Haswell TSX event aliases v2 Andi Kleen
2013-01-17 20:36 ` [PATCH 26/29] perf, tools: Add perf stat --transaction v2 Andi Kleen
2013-01-17 20:36 ` [PATCH 27/29] perf, x86: Add a Haswell precise instructions event v2 Andi Kleen
2013-01-17 20:36 ` [PATCH 28/29] perf, tools: Default to cpu// for events v5 Andi Kleen
2013-01-17 20:36 ` [PATCH 29/29] perf, tools: List kernel supplied event aliases in perf list v2 Andi Kleen
2013-01-24 11:39 ` perf PMU support for Haswell v7 Ingo Molnar
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