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From: Andi Kleen <andi@firstfloor.org>
To: mingo@elte.hu
Cc: linux-kernel@vger.kernel.org, a.p.zijlstra@chello.nl,
	akpm@linux-foundation.org, acme@redhat.com, eranian@google.com,
	jolsa@redhat.com, namhyung@kernel.org,
	Andi Kleen <ak@linux.intel.com>
Subject: [PATCH 08/29] perf, x86: Disable LBR recording for unknown LBR_FMT
Date: Thu, 17 Jan 2013 12:36:31 -0800	[thread overview]
Message-ID: <1358455012-12287-9-git-send-email-andi@firstfloor.org> (raw)
In-Reply-To: <1358455012-12287-1-git-send-email-andi@firstfloor.org>

From: Andi Kleen <ak@linux.intel.com>

When the LBR format is unknown disable LBR recording. This prevents
crashes when the LBR address is misdecoded and mis-sign extended.

Signed-off-by: Andi Kleen <ak@linux.intel.com>
---
 arch/x86/kernel/cpu/perf_event_intel_lbr.c |    3 ++-
 1 files changed, 2 insertions(+), 1 deletions(-)

diff --git a/arch/x86/kernel/cpu/perf_event_intel_lbr.c b/arch/x86/kernel/cpu/perf_event_intel_lbr.c
index 2af6695b..ad5af13 100644
--- a/arch/x86/kernel/cpu/perf_event_intel_lbr.c
+++ b/arch/x86/kernel/cpu/perf_event_intel_lbr.c
@@ -13,6 +13,7 @@ enum {
 	LBR_FORMAT_EIP		= 0x02,
 	LBR_FORMAT_EIP_FLAGS	= 0x03,
 	LBR_FORMAT_EIP_FLAGS2	= 0x04,
+	LBR_FORMAT_MAX_KNOWN	= LBR_FORMAT_EIP_FLAGS2,
 };
 
 /*
@@ -392,7 +393,7 @@ int intel_pmu_setup_lbr_filter(struct perf_event *event)
 	/*
 	 * no LBR on this PMU
 	 */
-	if (!x86_pmu.lbr_nr)
+	if (!x86_pmu.lbr_nr || x86_pmu.intel_cap.lbr_format > LBR_FORMAT_MAX_KNOWN)
 		return -EOPNOTSUPP;
 
 	/*
-- 
1.7.7.6


  parent reply	other threads:[~2013-01-17 20:41 UTC|newest]

Thread overview: 42+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-01-17 20:36 perf PMU support for Haswell v7 Andi Kleen
2013-01-17 20:36 ` [PATCH 01/29] perf, x86: Add PEBSv2 record support Andi Kleen
2013-01-17 20:36 ` [PATCH 02/29] perf, x86: Basic Haswell PMU support v2 Andi Kleen
2013-01-17 20:36 ` [PATCH 03/29] perf, x86: Basic Haswell PEBS support v3 Andi Kleen
2013-01-17 20:36 ` [PATCH 04/29] perf, x86: Support the TSX intx/intx_cp qualifiers v2 Andi Kleen
2013-01-17 20:36 ` [PATCH 05/29] perf, kvm: Support the intx/intx_cp modifiers in KVM arch perfmon emulation v4 Andi Kleen
2013-01-20 14:04   ` Gleb Natapov
2013-01-17 20:36 ` [PATCH 06/29] perf, x86: Support PERF_SAMPLE_ADDR on Haswell Andi Kleen
2013-01-17 20:36 ` [PATCH 07/29] perf, x86: Support Haswell v4 LBR format Andi Kleen
2013-01-17 20:36 ` Andi Kleen [this message]
2013-01-17 20:36 ` [PATCH 09/29] perf, x86: Support LBR filtering by INTX/NOTX/ABORT v2 Andi Kleen
2013-01-17 20:36 ` [PATCH 10/29] perf, tools: Add abort_tx,no_tx,in_tx branch filter options to perf record -j v3 Andi Kleen
2013-01-17 20:36 ` [PATCH 11/29] perf, tools: Support sorting by intx, abort branch flags v2 Andi Kleen
2013-01-17 20:36 ` [PATCH 12/29] perf, x86: Support full width counting Andi Kleen
2013-01-17 20:36 ` [PATCH 13/29] perf, x86: Avoid checkpointed counters causing excessive TSX aborts v3 Andi Kleen
2013-01-17 20:36 ` [PATCH 14/29] perf, core: Add a concept of a weightened sample v2 Andi Kleen
2013-01-17 20:36 ` [PATCH 15/29] perf, x86: Support weight samples for PEBS Andi Kleen
2013-01-17 20:36 ` [PATCH 16/29] perf, tools: Add support for weight v7 Andi Kleen
2013-01-23 11:38   ` Stephane Eranian
2013-01-23 11:54     ` Stephane Eranian
2013-01-23 16:56       ` Andi Kleen
2013-01-23 17:00       ` Stephane Eranian
2013-01-23 17:13         ` Andi Kleen
2013-01-23 17:25           ` Stephane Eranian
2013-01-23 18:02             ` Andi Kleen
2013-01-23 18:18               ` Stephane Eranian
2013-01-23 18:50                 ` Andi Kleen
2013-01-23 18:57                   ` Stephane Eranian
2013-01-17 20:36 ` [PATCH 17/29] perf, core: Add generic transaction flags v3 Andi Kleen
2013-01-17 20:36 ` [PATCH 18/29] perf, x86: Add Haswell specific transaction flag reporting Andi Kleen
2013-01-17 20:36 ` [PATCH 19/29] perf, tools: Add support for record transaction flags v3 Andi Kleen
2013-01-17 20:36 ` [PATCH 20/29] perf, tools: Add browser support for transaction flags v5 Andi Kleen
2013-01-17 20:36 ` [PATCH 21/29] perf, x86: Move NMI clearing to end of PMI handler after the counter registers are reset Andi Kleen
2013-01-17 20:36 ` [PATCH 22/29] tools, perf: Add a precise event qualifier v2 Andi Kleen
2013-01-17 20:36 ` [PATCH 23/29] perf, x86: improve sysfs event mapping with event string Andi Kleen
2013-01-17 20:36 ` [PATCH 24/29] perf, x86: Support CPU specific sysfs events Andi Kleen
2013-01-17 20:36 ` [PATCH 25/29] perf, x86: Add Haswell TSX event aliases v2 Andi Kleen
2013-01-17 20:36 ` [PATCH 26/29] perf, tools: Add perf stat --transaction v2 Andi Kleen
2013-01-17 20:36 ` [PATCH 27/29] perf, x86: Add a Haswell precise instructions event v2 Andi Kleen
2013-01-17 20:36 ` [PATCH 28/29] perf, tools: Default to cpu// for events v5 Andi Kleen
2013-01-17 20:36 ` [PATCH 29/29] perf, tools: List kernel supplied event aliases in perf list v2 Andi Kleen
2013-01-24 11:39 ` perf PMU support for Haswell v7 Ingo Molnar

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