From: Daniel Thompson <daniel.thompson@linaro.org>
To: Russell King <linux@arm.linux.org.uk>,
Thomas Gleixner <tglx@linutronix.de>,
Jason Cooper <jason@lakedaemon.net>
Cc: Daniel Thompson <daniel.thompson@linaro.org>,
Marex Vasut <marex@denx.de>, Harro Haan <hrhaan@gmail.com>,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, patches@linaro.org,
linaro-kernel@lists.linaro.org,
John Stultz <john.stultz@linaro.org>
Subject: [PATCH RFC 9/9] arm: imx: non-secure aliased mapping of GIC registers
Date: Mon, 21 Jul 2014 15:47:20 +0100 [thread overview]
Message-ID: <1405954040-30399-10-git-send-email-daniel.thompson@linaro.org> (raw)
In-Reply-To: <1405954040-30399-1-git-send-email-daniel.thompson@linaro.org>
Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org>
---
arch/arm/mach-imx/mach-imx6q.c | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c
index e60456d..192d268 100644
--- a/arch/arm/mach-imx/mach-imx6q.c
+++ b/arch/arm/mach-imx/mach-imx6q.c
@@ -381,10 +381,21 @@ static void __init imx6q_init_late(void)
}
}
+static struct map_desc gic_cpu_io_desc __initdata = {
+ .virtual = 0xff000000,
+ .pfn = __phys_to_pfn(0x00a00000),
+ .length = SZ_1M,
+ .type = MT_DEVICE_NS,
+};
+
static void __init imx6q_map_io(void)
{
debug_ll_io_init();
imx_scu_map_io();
+ /* TODO: Need to check we are running without a secure monitor before
+ * setting up this mapping.
+ */
+ iotable_init(&gic_cpu_io_desc, 1);
}
static void __init imx6q_init_irq(void)
--
1.9.3
next prev parent reply other threads:[~2014-07-21 14:49 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-07-21 14:47 [PATCH RFC 0/9] Fix INTACK for FIQ support on ARM Cortex A9 Daniel Thompson
2014-07-21 14:47 ` [PATCH RFC 1/9] irqchip: gic: Provide support for interrupt grouping Daniel Thompson
2014-07-21 16:07 ` Marek Vasut
2014-07-21 14:47 ` [PATCH RFC 2/9] irqchip: gic: Add support for FIQ management Daniel Thompson
2014-07-21 14:47 ` [PATCH RFC 3/9] irqchip: gic: Remove spin locks from eoi_irq Daniel Thompson
2014-07-21 14:47 ` [PATCH RFC 4/9] ARM: dump the status of NS bit in L1 PTE Daniel Thompson
2014-07-21 14:47 ` [PATCH RFC 5/9] ARM: Add L1 PTE non-secure mapping Daniel Thompson
2014-07-21 16:46 ` Russell King - ARM Linux
2014-07-22 10:16 ` Daniel Thompson
2014-07-21 14:47 ` [PATCH RFC 6/9] arm: mm: Avoid ioremap_page_range() for non-secure mappings Daniel Thompson
2014-07-21 14:47 ` [PATCH RFC 7/9] irqchip: gic: Use non-secure aliased register set when FIQ is enabled Daniel Thompson
2014-07-21 14:47 ` [PATCH RFC 8/9] ARM: socfpga: Map the GIC CPU registers as MT_DEVICE_NS Daniel Thompson
2014-07-21 14:47 ` Daniel Thompson [this message]
2014-07-21 16:15 ` [PATCH RFC 9/9] arm: imx: non-secure aliased mapping of GIC registers Marek Vasut
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1405954040-30399-10-git-send-email-daniel.thompson@linaro.org \
--to=daniel.thompson@linaro.org \
--cc=hrhaan@gmail.com \
--cc=jason@lakedaemon.net \
--cc=john.stultz@linaro.org \
--cc=linaro-kernel@lists.linaro.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux@arm.linux.org.uk \
--cc=marex@denx.de \
--cc=patches@linaro.org \
--cc=tglx@linutronix.de \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®