From: Daniel Thompson <daniel.thompson@linaro.org>
To: Russell King <linux@arm.linux.org.uk>,
Thomas Gleixner <tglx@linutronix.de>,
Jason Cooper <jason@lakedaemon.net>
Cc: Daniel Thompson <daniel.thompson@linaro.org>,
Marex Vasut <marex@denx.de>, Harro Haan <hrhaan@gmail.com>,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, patches@linaro.org,
linaro-kernel@lists.linaro.org,
John Stultz <john.stultz@linaro.org>
Subject: [PATCH RFC 6/9] arm: mm: Avoid ioremap_page_range() for non-secure mappings
Date: Mon, 21 Jul 2014 15:47:17 +0100 [thread overview]
Message-ID: <1405954040-30399-7-git-send-email-daniel.thompson@linaro.org> (raw)
In-Reply-To: <1405954040-30399-1-git-send-email-daniel.thompson@linaro.org>
ioremap_page_range() cannot provide us memory with the the non-secure
section flag set unfortunately at present ioremap+MT_DEVICE_NS will
fallback to this function and spuriously return a virtual pointer to
what is effectively MT_DEVICE memory.
This patch makes the fallback to ioremap_page_range() ineffective; to
allocate MT_DEVICE_NS memory we must rely instead on the platform startup
code providing a suitable static mapping.
Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org>
---
arch/arm/mm/ioremap.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm/mm/ioremap.c b/arch/arm/mm/ioremap.c
index d1e5ad7..1cb12f8 100644
--- a/arch/arm/mm/ioremap.c
+++ b/arch/arm/mm/ioremap.c
@@ -319,6 +319,10 @@ void __iomem * __arm_ioremap_pfn_caller(unsigned long pfn,
err = remap_area_sections(addr, pfn, size, type);
} else
#endif
+ if (type->prot_sect & PMD_SECT_NS)
+ /* required section flag is not achievable; give up */
+ return NULL;
+ else
err = ioremap_page_range(addr, addr + size, paddr,
__pgprot(type->prot_pte));
--
1.9.3
next prev parent reply other threads:[~2014-07-21 14:48 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-07-21 14:47 [PATCH RFC 0/9] Fix INTACK for FIQ support on ARM Cortex A9 Daniel Thompson
2014-07-21 14:47 ` [PATCH RFC 1/9] irqchip: gic: Provide support for interrupt grouping Daniel Thompson
2014-07-21 16:07 ` Marek Vasut
2014-07-21 14:47 ` [PATCH RFC 2/9] irqchip: gic: Add support for FIQ management Daniel Thompson
2014-07-21 14:47 ` [PATCH RFC 3/9] irqchip: gic: Remove spin locks from eoi_irq Daniel Thompson
2014-07-21 14:47 ` [PATCH RFC 4/9] ARM: dump the status of NS bit in L1 PTE Daniel Thompson
2014-07-21 14:47 ` [PATCH RFC 5/9] ARM: Add L1 PTE non-secure mapping Daniel Thompson
2014-07-21 16:46 ` Russell King - ARM Linux
2014-07-22 10:16 ` Daniel Thompson
2014-07-21 14:47 ` Daniel Thompson [this message]
2014-07-21 14:47 ` [PATCH RFC 7/9] irqchip: gic: Use non-secure aliased register set when FIQ is enabled Daniel Thompson
2014-07-21 14:47 ` [PATCH RFC 8/9] ARM: socfpga: Map the GIC CPU registers as MT_DEVICE_NS Daniel Thompson
2014-07-21 14:47 ` [PATCH RFC 9/9] arm: imx: non-secure aliased mapping of GIC registers Daniel Thompson
2014-07-21 16:15 ` Marek Vasut
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