From: Andi Kleen <andi@firstfloor.org>
To: peterz@infradead.org
Cc: acme@kernel.org, linux-kernel@vger.kernel.org, jolsa@redhat.com,
eranian@google.com, Andi Kleen <ak@linux.intel.com>
Subject: [PATCH 4/5] x86, perf: Use correct index to save/restore LBR_INFO with callstack
Date: Wed, 27 May 2015 21:13:17 -0700 [thread overview]
Message-ID: <1432786398-23861-5-git-send-email-andi@firstfloor.org> (raw)
In-Reply-To: <1432786398-23861-1-git-send-email-andi@firstfloor.org>
From: Andi Kleen <ak@linux.intel.com>
Use the correct index to save/restore the LBR_INFO_x MSR in
callstack mode. This is more a cleanup, as even with the wrong
index the register was correctly saved/restored, and also
LBR callgraph mode in perf tools do not really need anything in
LBR_INFO. But still better to use the right index.
Signed-off-by: Andi Kleen <ak@linux.intel.com>
---
arch/x86/kernel/cpu/perf_event_intel_lbr.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/x86/kernel/cpu/perf_event_intel_lbr.c b/arch/x86/kernel/cpu/perf_event_intel_lbr.c
index 5de2048..fa5c731 100644
--- a/arch/x86/kernel/cpu/perf_event_intel_lbr.c
+++ b/arch/x86/kernel/cpu/perf_event_intel_lbr.c
@@ -243,7 +243,7 @@ static void __intel_pmu_lbr_restore(struct x86_perf_task_context *task_ctx)
wrmsrl(x86_pmu.lbr_from + lbr_idx, task_ctx->lbr_from[i]);
wrmsrl(x86_pmu.lbr_to + lbr_idx, task_ctx->lbr_to[i]);
if (x86_pmu.intel_cap.lbr_format == LBR_FORMAT_INFO)
- wrmsrl(MSR_LBR_INFO_0 + i, task_ctx->lbr_info[i]);
+ wrmsrl(MSR_LBR_INFO_0 + lbr_idx, task_ctx->lbr_info[i]);
}
task_ctx->lbr_stack_state = LBR_NONE;
}
@@ -266,7 +266,7 @@ static void __intel_pmu_lbr_save(struct x86_perf_task_context *task_ctx)
rdmsrl(x86_pmu.lbr_from + lbr_idx, task_ctx->lbr_from[i]);
rdmsrl(x86_pmu.lbr_to + lbr_idx, task_ctx->lbr_to[i]);
if (x86_pmu.intel_cap.lbr_format == LBR_FORMAT_INFO)
- rdmsrl(MSR_LBR_INFO_0 + i, task_ctx->lbr_info[i]);
+ rdmsrl(MSR_LBR_INFO_0 + lbr_idx, task_ctx->lbr_info[i]);
}
task_ctx->lbr_stack_state = LBR_VALID;
}
--
2.1.0
next prev parent reply other threads:[~2015-05-28 4:13 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-05-28 4:13 Andi Kleen
2015-05-28 4:13 ` [PATCH 1/5] x86, perf: Allow time stamp for free running PEBSv3 Andi Kleen
2015-08-04 8:56 ` [tip:perf/core] perf/x86/intel/lbr: " tip-bot for Andi Kleen
2015-05-28 4:13 ` [PATCH 2/5] x86, perf: Add option to disable reading branch flags/cycles Andi Kleen
2015-06-15 10:48 ` Peter Zijlstra
2015-05-28 4:13 ` [PATCH 3/5] perf, tools: Disable branch flags/cycles for lbr call graph Andi Kleen
2015-05-28 4:13 ` Andi Kleen [this message]
2015-08-04 8:59 ` [tip:perf/core] perf/x86/intel/lbr: Use correct index to save/ restore LBR_INFO with call stack tip-bot for Andi Kleen
2015-05-28 4:13 ` [PATCH 5/5] x86, perf: Limit LBR accesses to TOS in callstack mode Andi Kleen
2015-08-04 8:59 ` [tip:perf/core] perf/x86/intel/lbr: " tip-bot for Andi Kleen
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